Investigation on the Effect of Gate Dielectric and Other Device Parameters on Digital Performance of Silicene Nanoribbon Tunnel FET

2020 ◽  
Vol 67 (7) ◽  
pp. 2966-2973 ◽  
Author(s):  
Niraj Kumar Singh ◽  
Manodipan Sahoo
Keyword(s):  
Gate Dielectric ◽  
Digital Performance ◽  
Tunnel Fet

Comparative analysis of full-gate and short-gate dielectric modulated electrically doped Tunnel-FET based biosensors

2017 ◽  
Vol 111 ◽  
pp. 767-775 ◽  
Author(s):  
Dheeraj Sharma ◽  
Deepika Singh ◽  
Sunil Pandey ◽  
Shivendra Yadav ◽  
P.N. Kondekar
Keyword(s):  
Comparative Analysis ◽  
Gate Dielectric ◽  
Tunnel Fet

Double-Gate Tunnel FET With High-$\kappa$ Gate Dielectric

2007 ◽  
Vol 54 (7) ◽  
pp. 1725-1733 ◽  
Author(s):  
Kathy Boucart ◽  
Adrian Mihai Ionescu
Keyword(s):  
Gate Dielectric ◽  
Double Gate ◽  
Tunnel Fet

Impact of Interface Trap Charges on Performance of Electrically Doped Tunnel FET With Heterogeneous Gate Dielectric

2017 ◽  
Vol 17 (1) ◽  
pp. 245-252 ◽  
Author(s):  
Pulimamidi Venkatesh ◽  
Kaushal Nigam ◽  
Sunil Pandey ◽  
Dheeraj Sharma ◽  
Pravin N. Kondekar
Keyword(s):  
Gate Dielectric ◽  
Interface Trap ◽  
Tunnel Fet ◽  
Trap Charges

Length scaling of the Double Gate Tunnel FET with a high-K gate dielectric

2007 ◽  
Vol 51 (11-12) ◽  
pp. 1500-1507 ◽  
Author(s):  
Kathy Boucart ◽  
Adrian Mihai Ionescu
Keyword(s):  
Gate Dielectric ◽  
Double Gate ◽  
Tunnel Fet ◽  
High K ◽  
Length Scaling ◽  
High K Gate Dielectric
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