Mathematical modeling insight of hetero gate dielectric-dual material gate-GAA-tunnel FET for VLSI/analog applications

Microsystem Technologies ◽

10.1007/s00542-016-2872-9 ◽

2016 ◽

Vol 23 (9) ◽

pp. 4091-4098 ◽

Author(s):

Jaya Madan ◽

R. S. Gupta ◽

Rishu Chaujar

Keyword(s):

Mathematical Modeling ◽

Gate Dielectric ◽

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Dual material gate doping-less tunnel FET with hetero gate dielectric for enhancement of analog/RF performance

Journal of Semiconductors ◽

10.1088/1674-4926/38/2/024001 ◽

2017 ◽

Vol 38 (2) ◽

pp. 024001 ◽

Author(s):

Sunny Anand ◽

R. K. Sarin

Keyword(s):

Gate Dielectric ◽

Rf Performance ◽

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Investigation of Electrostatic Integrity of Nanoscale Dual Material Gate Dielectric Pocket Silicon-on-Void (DMGDPSOV) MOSFET for Improved Device Scalability

IEEE Transactions on Nanotechnology ◽

10.1109/tnano.2014.2314146 ◽

2014 ◽

Vol 13 (4) ◽

pp. 667-675 ◽

Author(s):

Vandana Kumari ◽

Manoj Saxena ◽

R. S. Gupta ◽

Mridula Gupta

Keyword(s):

Gate Dielectric ◽

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Comparative analysis of full-gate and short-gate dielectric modulated electrically doped Tunnel-FET based biosensors

Superlattices and Microstructures ◽

10.1016/j.spmi.2017.07.035 ◽

2017 ◽

Vol 111 ◽

pp. 767-775 ◽

Author(s):

Dheeraj Sharma ◽

Deepika Singh ◽

Sunil Pandey ◽

Shivendra Yadav ◽

P.N. Kondekar

Keyword(s):

Comparative Analysis ◽

Gate Dielectric ◽

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High on-current and low threshold GaSb-InAs heterostructure dual-material DG tunnel-FET

2017 IEEE Region 10 Humanitarian Technology Conference (R10-HTC) ◽

10.1109/r10-htc.2017.8289006 ◽

2017 ◽

Author(s):

Md. Abdullah-Al-Kaiser ◽

Dip Joti Paul ◽

Quazi D. M. Khosru

Keyword(s):

Low Threshold ◽

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Influence of Source Stack and Heterogeneous Gate Dielectric on Band to Band Tunneling Rate of Tunnel FET

Silicon ◽

10.1007/s12633-019-00272-9 ◽

2019 ◽

Vol 12 (8) ◽

pp. 1811-1817 ◽

Author(s):

Mohammad Karbalaei ◽

Daryoosh Dideban

Keyword(s):

Gate Dielectric ◽

Tunneling Rate ◽

Band To Band Tunneling

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A charge-based capacitance model for double-gate hetero-gate-dielectric tunnel FET

Superlattices and Microstructures ◽

10.1016/j.spmi.2020.106748 ◽

2020 ◽

pp. 106748

Author(s):

Sarabjeet Kaur ◽

Ashish Raman ◽

Rakesh Kumar Sarin

Keyword(s):

Gate Dielectric ◽

Double Gate ◽

Capacitance Model ◽

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Examination of the impingement of interface trap charges on heterogeneous gate dielectric dual material control gate tunnel field effect transistor for the refinement of device reliability

Micro & Nano Letters ◽

10.1049/mnl.2017.0869 ◽

2018 ◽

Vol 13 (8) ◽

pp. 1192-1196

Author(s):

Sarthak Gupta ◽

Dheeraj Sharma ◽

Deepak Soni ◽

Shivendra Yadav ◽

Mohd. Aslam ◽

...

Keyword(s):

Field Effect ◽

Field Effect Transistor ◽

Gate Dielectric ◽

Interface Trap ◽

Material Control ◽

Device Reliability ◽

Effect Transistor ◽

Tunnel Field Effect Transistor ◽

Dual Material ◽

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Double-Gate Tunnel FET With High-$\kappa$ Gate Dielectric

IEEE Transactions on Electron Devices ◽

10.1109/ted.2007.899389 ◽

2007 ◽

Vol 54 (7) ◽

pp. 1725-1733 ◽

Author(s):

Kathy Boucart ◽

Adrian Mihai Ionescu

Keyword(s):

Gate Dielectric ◽

Double Gate ◽

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Performance Improvement in Nanoscale Ge–GaAs Heterojunction Junctionless Tunnel FET Using a Dual Material Gate

Journal of Low Power Electronics ◽

10.1166/jolpe.2014.1348 ◽

2014 ◽

Vol 10 (3) ◽

pp. 354-360 ◽

Author(s):

Bahniman Ghosh ◽

Shibir Basak ◽

Pranav Kumar Asthana

Keyword(s):

Performance Improvement ◽

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Interfacial Charge Analysis of Heterogeneous Gate Dielectric-Gate All Around-Tunnel FET for Improved Device Reliability

IEEE Transactions on Device and Materials Reliability ◽

10.1109/tdmr.2016.2564448 ◽

2016 ◽

Vol 16 (2) ◽

pp. 227-234 ◽

Author(s):

Jaya Madan ◽

Rishu Chaujar

Keyword(s):

Gate Dielectric ◽

Device Reliability ◽

Charge Analysis ◽

Interfacial Charge

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