Nowadays with the increases of the density of large scale integrated circuits, researches of Design for Test (DFT) become more and more important, JTAG (JTAG: Joint Test Action Group, also called Boundary Scan ) has been widely used in test area , which improves the testability and reliability of mixed-signal circuits. This paper puts forward a scheme to design a Built-in Test System (BITS) based on boundary scan technology. The BITS is realized in a weapon electronic control system, which is composed of mixed-signal circuits including ARM, AD/DA, FPGA, etc. With this method, several test experiments are carried out in the BITS, which include infrastructure integrity test, interconnect test, cluster test, AD/DA test and so on. The results of experiments show that the Built-in Test System based on JTAG can work normally, which is able to reduce effectively the complexity and the time of test. In a word, the capability of BITS is viable and the system is a virtual tool in the process of DFT design and application.
Modeling a verification test system for mixed-signal circuits