A Bit-Serial Pipelined Architecture for High-Performance DHT Computation in Quantum-Dot Cellular Automata

2015 ◽  
Vol 23 (10) ◽  
pp. 2352-2356 ◽  
Author(s):  
Vikramkumar Pudi ◽  
K. Sridharan
Keyword(s):  
Cellular Automata ◽  
Quantum Dot ◽  
High Performance ◽  
Quantum Dot Cellular Automata ◽  
Pipelined Architecture ◽  
Bit Serial

An Area and Energy Efficient RAM Cell Design in Quantum Dot Cellular Automata

2019 ◽  
Vol 16 (10) ◽  
pp. 4179-4187
Author(s):  
Amanpreet Sandhu ◽  
Sheifali Gupta
Keyword(s):  
Cellular Automata ◽  
Quantum Dot ◽  
High Performance ◽  
Complementary Metal Oxide Semiconductor ◽  
Cmos Technology ◽  
Oxide Semiconductor ◽  
Short Channel Effects ◽  
Short Channel ◽  
Quantum Dot Cellular Automata ◽  
Channel Effects

The Conventional Complementary Metal oxide semiconductor (CMOS) technology has been revolutionized from the past few decades. However, the CMOS circuit faces serious constraints like short channel effects, quantum effects, doping fluctuations at the nanoscale which limits them to further scaling down at nano meter range. Among various existing nanotechnologies, Quantum dot Cellular Automata (QCA) provides new solution at nanocircuit design. The technical advancement of the paper lies in designing a high performance RAM cell with less QCA cells, less occupational area and lower power dissipation characteristics. The design occupies 12.5% lower area, 16.6% lower input to output delay, and dissipates 18.26% lesser energy than the designs in the literature. The proposed RAMcell is robust due to lesser noise variations. Also it has less fabrication cost due to absence of rotated cells.

Dual-Edge Triggered T Flip-Flop Structure Using Quantum-Dot Cellular Automata

2013 ◽  
Vol 662 ◽  
pp. 562-567 ◽  
Author(s):  
Lin Rong Xiao ◽  
Xiang Xu ◽  
Shi Yan Ying
Keyword(s):  
Cellular Automata ◽  
Quantum Dot ◽  
Circuit Design ◽  
High Performance ◽  
Clock Frequency ◽  
Single Edge ◽  
Sequential Circuit ◽  
Flip Flop ◽  
Quantum Dot Cellular Automata ◽  
Combinational Logic Circuits

As an emerging nanotechnology, quantum-dot cellular automata (QCA) has the potential to be used for next generation VLSI. Various designs of combinational logic circuits have been proposed for QCA implementation, but sequential circuit design is limited due to the lack of high-performance QCA flip-flops. After an introduction on QCA and dual-edge triggered (DET) flip-flops, a new QCA DET T flip-flop following a pulsed latch scheme is presented. The proposed T flip-flop is simulated using QCADesigner simulator and its logic functionality is verified. The same data throughput of the DET flip-flop can be achieved while operating at half the clock frequency of a single-edge triggered (SET) counterpart. The proposed flip-flop is promising in building QCA sequential circuits with low power and high performance.

Efficient Design of QCA Adder Structures

2007 ◽  
Vol 121-123 ◽  
pp. 553-556 ◽  
Author(s):  
Sansiri Haruehanroengra ◽  
Wei Wang
Keyword(s):  
Cellular Automata ◽  
High Performance ◽  
Efficient Design ◽  
Quantum Dot Cellular Automata ◽  
Technological Paradigm ◽  
Look Ahead ◽  
Ripple Carry Adder ◽  
Carry Select Adder ◽  
Simulation Results ◽  
Bit Serial

Optimizing arithmetic primitives such as quantum-dot cellular automata (QCA) adders is important for investigating high-performance QCA computers in this emerging nano-technological paradigm. In this paper, we demonstrate that QCA ripple carry adder and bit-serial adder designs actually outperform carry-look-ahead and carry-select adder designs because of the increase in required interconnects. Simulation results obtained by using the QCADesigner tool for the proposed adder designs are also presented.

Design of a New Multiplexer Structure Based on a New Fault-Tolerant Majority Gate in Quantum-Dot Cellular Automata

2021 ◽  
Author(s):  
Yaser Rahmani ◽  
Saeed Rasouli Heikalabad ◽  
Mohammad Mosleh
Keyword(s):  
Fault Tolerance ◽  
Cellular Automata ◽  
Quantum Dot ◽  
High Performance ◽  
Fault Tolerant ◽  
Cmos Technology ◽  
Good Alternative ◽  
Majority Gate ◽  
Power Efficient ◽  
Quantum Dot Cellular Automata

Abstract Quantum-dot Cellular Automata (QCA) technology is believed to be a good alternative to CMOS technology. This nanoscale technology can provide a platform for design and implementation of high performance and power efficient logic circuits. However, the fabrication of QCA circuits is susceptible to faults appearing in this form of missing cells, additional cells, rotated cells, and displaced cells. Over the years, several solutions have been proposed to address these problems. This paper presents a new solution for improving the fault tolerance of three input majority gate. The proposed majority gate is then used to design 2-1 multiplexer and 4-1 multiplexer. The proposed designs are implemented in QCA Designer. Simulation results demonstrate significant improvements in terms of fault tolerance and area requirement.

High-performance multiplexer architecture for quantum-dot cellular automata

2016 ◽  
Vol 15 (3) ◽  
pp. 968-981 ◽  
Author(s):  
Hamid Rashidi ◽  
Abdalhossein Rezai ◽  
Sheema Soltany
Keyword(s):  
Cellular Automata ◽  
Quantum Dot ◽  
High Performance ◽  
Quantum Dot Cellular Automata

Improved Quantum Dot Cellular Automata 4:1 Multiplexer Circuit Unit

2014 ◽  
Vol 2014 (1) ◽  
pp. 37-44 ◽  
Author(s):  
Arighna Sarkar ◽  
◽  
Debarka Mukhopadhyay ◽  
Keyword(s):  
Cellular Automata ◽  
Quantum Dot ◽  
Quantum Dot Cellular Automata
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