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Comparative evaluation of Tunnel-FET ultra-low voltage SRAM bitcell and impact of variations
2014 5th European Workshop on CMOS Variability (VARI)
◽
10.1109/vari.2014.6957083
◽
2014
◽
Author(s):
Massimo Alioto
◽
David Esseni
Keyword(s):
Comparative Evaluation
◽
Low Voltage
◽
Tunnel Fet
Download Full-text
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Comparative evaluation of multilevel converters with IGBT modules for low voltage applications
2017 19th European Conference on Power Electronics and Applications (EPE'17 ECCE Europe)
◽
10.23919/epe17ecceeurope.2017.8099339
◽
2017
◽
Author(s):
Alan Wilson
◽
Steffen Bernet
Keyword(s):
Comparative Evaluation
◽
Low Voltage
◽
Multilevel Converters
◽
Igbt Modules
Download Full-text
Device-circuit co-design and comparison of ultra-low voltage Tunnel-FET and CMOS digital circuits
2014 IEEE 12th International New Circuits and Systems Conference (NEWCAS)
◽
10.1109/newcas.2014.6934047
◽
2014
◽
Cited By ~ 1
Author(s):
David Esseni
◽
Massimo Alioto
Keyword(s):
Digital Circuits
◽
Low Voltage
◽
Tunnel Fet
Download Full-text
Performance and Impact of Process Variations in Tunnel-FET Ultra-Low Voltage Digital Circuits
Proceedings of the 27th Symposium on Integrated Circuits and Systems Design - SBCCI '14
◽
10.1145/2660540.2661000
◽
2014
◽
Cited By ~ 1
Author(s):
Massimo Alioto
◽
David Esseni
Keyword(s):
Digital Circuits
◽
Low Voltage
◽
Process Variations
◽
Tunnel Fet
Download Full-text
A virtual III-V tunnel FET technology platform for ultra-low voltage comparators and level shifters
2017 13th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME)
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10.1109/prime.2017.7974128
◽
2017
◽
Author(s):
Francesco Settino
◽
Marco Lanuzza
◽
Sebastiano Strangio
◽
Felice Crupi
◽
Pierpaolo Palestri
◽
...
Keyword(s):
Low Voltage
◽
Technology Platform
◽
Tunnel Fet
◽
Level Shifters
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Variation Analysis for Ultra-Low Voltage 8T Tunnel FET SRAM Using Closed-Form Analytical Model of Static Noise Margin
10.7567/ssdm.2015.k-1-4
◽
2015
◽
Author(s):
H. Fuketa
◽
S. O'uchi
◽
K. Fukuda
◽
T. Mori
◽
Y. Morita
◽
...
Keyword(s):
Closed Form
◽
Analytical Model
◽
Low Voltage
◽
Variation Analysis
◽
Static Noise Margin
◽
Noise Margin
◽
Tunnel Fet
◽
Static Noise
Download Full-text
Closed-form analytical model of static noise margin for ultra-low voltage eight-transistor tunnel FET static random access memory
Japanese Journal of Applied Physics
◽
10.7567/jjap.55.04ed06
◽
2016
◽
Vol 55
(4S)
◽
pp. 04ED06
◽
Cited By ~ 4
Author(s):
Hiroshi Fuketa
◽
Shin-ichi O’uchi
◽
Koichi Fukuda
◽
Takahiro Mori
◽
Yukinori Morita
◽
...
Keyword(s):
Closed Form
◽
Analytical Model
◽
Low Voltage
◽
Random Access
◽
Random Access Memory
◽
Static Random Access Memory
◽
Access Memory
◽
Noise Margin
◽
Tunnel Fet
◽
Static Noise
Download Full-text
TBAL: Tunnel FET-Based Adiabatic Logic for Energy-Efficient, Ultra-Low Voltage IoT Applications
IEEE Journal of the Electron Devices Society
◽
10.1109/jeds.2019.2891204
◽
2019
◽
Vol 7
◽
pp. 210-218
◽
Cited By ~ 4
Author(s):
Jheng-Sin Liu
◽
Michael B. Clavel
◽
Mantu K. Hudait
Keyword(s):
Energy Efficient
◽
Low Voltage
◽
Iot Applications
◽
Tunnel Fet
◽
Adiabatic Logic
Download Full-text
An Ultra-low-Voltage Energy-efficient Dynamic Fully-Regenerative Latch-based Level-Shifter Circuit with Tunnel-FET & FinFET devices
2021 IEEE International Symposium on Circuits and Systems (ISCAS)
◽
10.1109/iscas51556.2021.9401097
◽
2021
◽
Author(s):
Qiao Cai
◽
Yuxin Ji
◽
Ce Ma
◽
Xiaocui Li
◽
Ting Zhou
◽
...
Keyword(s):
Energy Efficient
◽
Low Voltage
◽
Tunnel Fet
◽
Level Shifter
Download Full-text
A Low Voltage Discriminant Circuit for Pattern Recognition Exploiting the Asymmetrical Characteristics of Tunnel FET
2020 IEEE International Symposium on Circuits and Systems (ISCAS)
◽
10.1109/iscas45731.2020.9180724
◽
2020
◽
Author(s):
Aditya Japa
◽
Yellappa Palagani
◽
Venkateswarlu Gonuguntla
◽
Manoj Kumar Majumder
◽
Subhendu K. Sahoo
◽
...
Keyword(s):
Pattern Recognition
◽
Low Voltage
◽
Tunnel Fet
Download Full-text
Tunnel FET based low voltage static vs dynamic logic families for energy efficiency
18th International Symposium on VLSI Design and Test
◽
10.1109/isvdat.2014.6881042
◽
2014
◽
Cited By ~ 5
Author(s):
Kasturi Subramanyam
◽
Sadulla Shaik
◽
Ramesh Vaddi
Keyword(s):
Energy Efficiency
◽
Low Voltage
◽
Dynamic Logic
◽
Tunnel Fet
Download Full-text
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