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Performance Enhancement in 45-nm Ni Fully-Silicided Gate/High-k CMIS Using Substrate Ion Implantation
2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers.
◽
10.1109/vlsit.2006.1705272
◽
2006
◽
Cited By ~ 3
Author(s):
Y. Nishida
◽
T. Yamashita
◽
S. Yamanari
◽
M. Higashi
◽
K. Shiga
◽
...
Keyword(s):
Ion Implantation
◽
Performance Enhancement
◽
High K
Download Full-text
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References
Performance Enhancement of Multigate FinFETs by Using High-k Stack Oxide
2019 1st International Conference on Advances in Science, Engineering and Robotics Technology (ICASERT)
◽
10.1109/icasert.2019.8934656
◽
2019
◽
Author(s):
Emdadul Huq Minhaj
◽
Muhammad Abdur Razzak
◽
Md. Majharul Islam
◽
Md. Mohsinur Rahman Adnan
Keyword(s):
Performance Enhancement
◽
High K
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Phosphorus ion implantation and POCl3 doping effects of n+-polycrystalline-silicon/high-k gate dielectric (HfO2 and Al2O3) films
Applied Physics Letters
◽
10.1063/1.1697646
◽
2004
◽
Vol 84
(15)
◽
pp. 2868-2870
◽
Cited By ~ 3
Author(s):
Chihoon Lee
◽
Jihoon Choi
◽
Moonju Cho
◽
Doo Seok Jeong
◽
Cheol Seong Hwang
◽
...
Keyword(s):
Ion Implantation
◽
Polycrystalline Silicon
◽
Gate Dielectric
◽
High K
◽
Doping Effects
◽
Al2o3 Films
◽
High K Gate Dielectric
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Performance enhancement of Ge-on-Insulator tunneling FETs with source junctions formed by low-energy BF2 ion implantation
Japanese Journal of Applied Physics
◽
10.7567/jjap.57.04fd15
◽
2018
◽
Vol 57
(4S)
◽
pp. 04FD15
◽
Cited By ~ 3
Author(s):
Takumi Katoh
◽
Ryo Matsumura
◽
Ryotaro Takaguchi
◽
Mitsuru Takenaka
◽
Shinichi Takagi
Keyword(s):
Ion Implantation
◽
Performance Enhancement
◽
Low Energy
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Performance Enhancement of FinFET Devices with Gate-Stack (GS) High-K Dielectrics for Nanoscale Applications
Silicon
◽
10.1007/s12633-018-9774-7
◽
2018
◽
Vol 10
(6)
◽
pp. 2419-2429
◽
Cited By ~ 4
Author(s):
Vadthiya Narendar
Keyword(s):
Performance Enhancement
◽
Gate Stack
◽
High K
Download Full-text
Subthreshold Analog/RF Performance Enhancement of Underlap DG FETs With High- $k$ Spacer for Low Power Applications
IEEE Transactions on Electron Devices
◽
10.1109/ted.2012.2226724
◽
2013
◽
Vol 60
(1)
◽
pp. 63-69
◽
Cited By ~ 46
Author(s):
Kalyan Koley
◽
Arka Dutta
◽
Binit Syamal
◽
Samar K. Saha
◽
Chandan Kumar Sarkar
Keyword(s):
Low Power
◽
Performance Enhancement
◽
High K
◽
Rf Performance
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Performance enhancement of GOI tunneling FETs with source junctions formed by low energy BF2 ion implantation
10.7567/ssdm.2017.ps-3-02
◽
2017
◽
Author(s):
T. Katoh
◽
R. Matsumura
◽
R. Takaguchi
◽
M. Takenaka
◽
S. Takagi
Keyword(s):
Ion Implantation
◽
Performance Enhancement
◽
Low Energy
Download Full-text
The study of flat-band voltage shift using arsenic ion-implantation with High-k/Metal Inserted Poly Si gate stacks
2011 Proceedings of the European Solid-State Device Research Conference (ESSDERC)
◽
10.1109/essderc.2011.6044230
◽
2011
◽
Cited By ~ 1
Author(s):
BeomYong Kim
◽
YunHyuck Ji
◽
SeungMi Lee
◽
BongSeok Jeon
◽
KeeJeung Lee
◽
...
Keyword(s):
Ion Implantation
◽
Flat Band
◽
Flat Band Voltage
◽
Gate Stacks
◽
Voltage Shift
◽
High K
Download Full-text
N-type VT tuning by Te ion implantation in moly-based metal gates with high-k dielectric for fully depleted devices
ESSDERC 2008 - 38th European Solid-State Device Research Conference
◽
10.1109/essderc.2008.4681754
◽
2008
◽
Author(s):
J. Petry
◽
G. Boccardi
◽
K. Xiong
◽
M. Muller
◽
J. Hooker
◽
...
Keyword(s):
Ion Implantation
◽
Fully Depleted
◽
Metal Gates
◽
High K
◽
High K Dielectric
◽
Type V
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Impact of Aluminum Ion Implantation on the Low Frequency Noise Characteristics of Hf-Based High-\(k\) /Metal Gate pMOSFETs
IEEE Electron Device Letters
◽
10.1109/led.2014.2336866
◽
2014
◽
Vol 35
(9)
◽
pp. 954-956
◽
Cited By ~ 1
Author(s):
Tsung-Hsien Kao
◽
Osbert Cheng
◽
Shoou-Jinn Chang
◽
San-Lein Wu
◽
Chung-Yi Wu
◽
...
Keyword(s):
Ion Implantation
◽
Low Frequency
◽
Frequency Noise
◽
Low Frequency Noise
◽
Metal Gate
◽
Aluminum Ion
◽
Noise Characteristics
◽
High K
Download Full-text
Performance Enhancement of Metal Floating Gate Memory by Using a Bandgap Engineered High-k Tunneling Barrier
ECS Transactions
◽
10.1149/07202.0051ecst
◽
2016
◽
Vol 72
(2)
◽
pp. 51-55
Author(s):
D. Jiang
◽
L. Jin
◽
Z. Xia
◽
G. Chen
◽
X. Zou
◽
...
Keyword(s):
Performance Enhancement
◽
Floating Gate
◽
Tunneling Barrier
◽
High K
◽
Floating Gate Memory
Download Full-text
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