Integrating SOI and Poly-Si Surface Structures Using a Monolithic Process

2003 ◽  
Author(s):  
Mingching Wu ◽  
Shiunafang Shy ◽  
Weileun Fang
Keyword(s):  
Thin Film ◽  
Self Assembly ◽  
Single Crystal Silicon ◽  
Optical Quality ◽  
Mems Devices ◽  
Crystal Silicon ◽  
High Optical Quality ◽  
Out Of Plane ◽  
Variable Optical Attenuators ◽  
Bimorph Beam

This work has successfully integrated thick SCS and thin film poly-Si microstructures on a SOI wafer using monolithic processes. Thus high optical quality SOI micromirror and large output microactuators are available using the thick SOI wafer. Moreover, the poly-Si thin film microstructures serve as microhinges and stress-induced self-assembly mechanisms. The microstructures will be lifted and assembled by SixNy/Poly-Si bimorph beams after releasing. This work adopted in-plane movable optical stage and out-of-plane pop-up mirror to demonstrate the characteristic of proposed process. Some reliability testing results showed that the SixNy/Poly-Si bimorph beam was reliable for self-assembly applications. In summary, this integrated process can substantially increase the feasibility and extensibility of fabricating MEMS devices using single crystal silicon (SCS) and poly-Si. In applications, various 3-dimesional optical devices, such as optical switches, variable optical attenuators, and micro-scanners, can be developed by proposed process after assembling the SCS micromirror and poly-Si microstructures.

scholarly journals Amorphous thin-film oxide power devices operating beyond bulk single-crystal silicon limit

2021 ◽  
Vol 11 (1) ◽  
Author(s):  
Yuki Tsuruma ◽  
Emi Kawashima ◽  
Yoshikazu Nagasaki ◽  
Takashi Sekiya ◽  
Gaku Imamura ◽  
...  
Keyword(s):  
Thin Film ◽  
Single Crystal ◽  
Flexible Substrate ◽  
Single Crystal Silicon ◽  
Bulk Single Crystal ◽  
Next Generation ◽  
Power Devices ◽  
Large Area ◽  
Crystal Silicon ◽  
Amorphous Thin Film

AbstractPower devices (PD) are ubiquitous elements of the modern electronics industry that must satisfy the rigorous and diverse demands for robust power conversion systems that are essential for emerging technologies including Internet of Things (IoT), mobile electronics, and wearable devices. However, conventional PDs based on “bulk” and “single-crystal” semiconductors require high temperature (> 1000 °C) fabrication processing and a thick (typically a few tens to 100 μm) drift layer, thereby preventing their applications to compact devices, where PDs must be fabricated on a heat sensitive and flexible substrate. Here we report next-generation PDs based on “thin-films” of “amorphous” oxide semiconductors with the performance exceeding the silicon limit (a theoretical limit for a PD based on bulk single-crystal silicon). The breakthrough was achieved by the creation of an ideal Schottky interface without Fermi-level pinning at the interface, resulting in low specific on-resistance Ron,sp (< 1 × 10–4 Ω cm2) and high breakdown voltage VBD (~ 100 V). To demonstrate the unprecedented capability of the amorphous thin-film oxide power devices (ATOPs), we successfully fabricated a prototype on a flexible polyimide film, which is not compatible with the fabrication process of bulk single-crystal devices. The ATOP will play a central role in the development of next generation advanced technologies where devices require large area fabrication on flexible substrates and three-dimensional integration.

Measurement of Stress and Strain of Single-Crystal-Silicon Thin Film during On-Chip Tensile Test

1999 ◽  
Vol 119 (2) ◽  
pp. 67-72 ◽  
Author(s):  
Taeko Ando ◽  
Tetsuo Yoshioka ◽  
Mitsuhiro Shikida ◽  
Kazuo Sato ◽  
Tatsuo Kawabata
Keyword(s):  
Thin Film ◽  
Tensile Test ◽  
Single Crystal ◽  
Single Crystal Silicon ◽  
Stress And Strain ◽  
Silicon Thin Film ◽  
Crystal Silicon ◽  
On Chip

scholarly journals Amorphous thin-film oxide power devices operating beyond bulk single-crystal silicon limit

2021 ◽  
Author(s):  
Yuki Tsuruma ◽  
Emi Kawashima ◽  
Yoshikazu Nagasaki ◽  
Takashi Sekiya ◽  
Gaku Imamura ◽  
...  
Keyword(s):  
Thin Film ◽  
Single Crystal ◽  
Flexible Substrate ◽  
Single Crystal Silicon ◽  
Bulk Single Crystal ◽  
Next Generation ◽  
Power Devices ◽  
Large Area ◽  
Crystal Silicon ◽  
Amorphous Thin Film

Abstract Power devices (PD) are ubiquitous elements of the modern electronics industry that must satisfy the rigorous and diverse demands for robust power conversion systems that are essential for emerging technologies including Internet of Things (IoT), mobile electronics, and wearable devices. However, conventional PDs based on “bulk” and “single-crystal” semiconductors require high temperature (>1000°C) fabrication processing and a thick (typically a few tens to 100 μm) drift layer1, thereby preventing their applications to compact devices2, where PDs must be fabricated on a heat sensitive and flexible substrate. Here we report next-generation PDs based on “thin-films” of “amorphous” oxide semiconductors with the performance exceeding the silicon limit (a theoretical limit for a PD based on bulk single-crystal silicon3). The breakthrough was achieved by the creation of an ideal Schottky interface without Fermi-level pinning at the interface, resulting in low specific on-resistance Ron,sp (<1×10-4 Ωcm2) and high breakdown voltage VBD (~100 V). To demonstrate the unprecedented capability of the amorphous thin-film oxide power devices (ATOPs), we successfully fabricated a prototype on a flexible polyimide film, which is not compatible with the fabrication process of bulk single-crystal devices. The ATOP will play a central role in the development of next generation advanced technologies where devices require large area fabrication on flexible substrates and three-dimensional integration.

High-speed strained-single-crystal-silicon thin-film transistors on flexible polymers

2006 ◽  
Vol 100 (1) ◽  
pp. 013708 ◽  
Author(s):  
Hao-Chih Yuan ◽  
Zhenqiang Ma ◽  
Michelle M. Roberts ◽  
Donald E. Savage ◽  
Max G. Lagally
Keyword(s):  
Thin Film ◽  
Single Crystal ◽  
Thin Film Transistors ◽  
High Speed ◽  
Single Crystal Silicon ◽  
Flexible Polymers ◽  
Silicon Thin Film ◽  
Crystal Silicon

Three Generations of Solar Cells

2021 ◽  
Vol 1165 ◽  
pp. 113-130
Author(s):  
Romyani Goswami
Keyword(s):  
Thin Film ◽  
Solar Cells ◽  
Solar Cell ◽  
Single Crystal ◽  
Amorphous Silicon ◽  
Cost Reduction ◽  
High Stability ◽  
Single Crystal Silicon ◽  
Nanocrystalline Silicon ◽  
Crystal Silicon

In photovoltaic system the major challenge is the cost reduction of the solar cell module to compete with those of conventional energy sources. Evolution of solar photovoltaic comprises of several generations through the last sixty years. The first generation solar cells were based on single crystal silicon and bulk polycrystalline Si wafers. The single crystal silicon solar cell has high material cost and the fabrication also requires very high energy. The second generation solar cells were based on thin film fabrication technology. Due to low temperature manufacturing process and less material requirement, remarkable cost reduction was achieved in these solar cells. Among all the thin film technologies amorphous silicon thin film solar cell is in most advanced stage of development and is commercially available. However, an inherent problem of light induced degradation in amorphous silicon hinders the higher efficiency in this kind of cell. The third generation silicon solar cells are based on nano-crystalline and nano-porous materials. Hydrogenated nanocrystalline silicon (nc-Si:H) is becoming a promising material as an absorber layer of solar cell due to its high stability with high Voc. It is also suggested that the cause of high stability and less degradation of certain nc-Si:H films may be due to the improvement of medium range order (MRO) of the films. During the last ten years, organic, polymer, dye sensitized and perovskites materials are also attract much attention of the photovoltaic researchers as the low budget next generation PV material worldwide. Although most important challenge for those organic solar cells in practical applications is the stability issue. In this work nc-Si:H films are successfully deposited at a high deposition rate using a high pressure and a high power by Radio Frequency Plasma Enhanced Chemical Vapor Deposition (RF PECVD) technique. The transmission electron microscopy (TEM) studies show the formations of distinct nano-sized grains in the amorphous tissue with sharp crystalline orientations. Light induced degradation of photoconductivity of nc-Si:H materials have been studied. Single junction solar cells and solar module were successfully fabricated using nanocrystalline silicon as absorber layer. The optimum cell is 7.1 % efficient initially. Improvement in efficiency can be achieved by optimizing the doped layer/interface and using Ag back contact.

A In Situ Measuring Method for Stress Gradient of a MEMS Film

2009 ◽  
Vol 60-61 ◽  
pp. 357-360 ◽  
Author(s):  
Han Chen ◽  
Hua Rong ◽  
Ming Wang
Keyword(s):  
Thin Film ◽  
Circular Plate ◽  
Stress Gradient ◽  
Measuring Method ◽  
Mechanical Parameter ◽  
Curvature Radius ◽  
Mems Devices ◽  
Out Of Plane

The stress gradient of a deposited thin-film is a mechanical parameter that affects the performance of MEMS devices, so in-situ measuring stress gradient of a thin-film is great significant. A new in-situ measuring method based on a center-anchored circular plate is presented. The Mirau interferometer has been used to measure the out-of-plane height at the edge of circular plate, then the curvature radius of the plate and the stress gradient of the film can be calculated. The measuring method has been verified by CoventorWare. The accuracy of the presented measuring method is ideal. The advantages of the method also have been discussed.

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