A COMPARISON OF SILICON AND III–V TECHNOLOGY PERFORMANCE AND BUILDING BLOCK IMPLEMENTATIONS FOR 10 AND 40 Gb/s OPTICAL NETWORKING ICs

2003 ◽  
Vol 13 (01) ◽  
pp. 27-57 ◽  
Author(s):  
S. P. VOINIGESCU ◽  
D. S. McPHERSON ◽  
F. PERA ◽  
S. SZILAGYI ◽  
M. TAZLAUANU ◽  
...  
Keyword(s):  
Fiber Optics ◽  
Transmission Lines ◽  
Leading Edge ◽  
Building Blocks ◽  
Optical Networking ◽  
Passive Components ◽  
Limiting Amplifier ◽  
Isolation Techniques ◽  
Sige Bicmos ◽  
Technology Comparison

Scalable models for both active and passive components are essential for the design of highly integrated fiber–optic physical layer ICs. This paper focuses on the various technology options available of 10 Gb/s and 40 Gb/s applications, on how their constituent components are modeled and what the characteristics and requirements are for the basic building blocks. As part of the technology comparison, an overview of the performance of leading edge Si CMOS, SiGe BiCMOS and III–V technologies is presented. Scalable models for SiGe HBTs and GaAs p–HEMTs are then compared with measured data for various device sizes. Inductors, varactors, transmission lines and isolation techniques on Si and III–V substrates are discussed next followed by technology–specific implementations of VCO and digital building blacks. Finally, Transimpedance Limiting Amplifier (TIALA) as well as laser and modulator driver designs in SiGe BiCMOS, InP HBT and GaAs p–HEMT processes using scalable device models are illustrated for 10 and 40 Gb/s fiber-optics applications.

scholarly journals Design of a 0.13 µm SiGe Limiting Amplifier with 14.6 THz Gain-Bandwidth-Product

2017 ◽  
Vol 15 ◽  
pp. 115-121
Author(s):  
Sehoon Park ◽  
Xuan-Quang Du ◽  
Markus Grözing ◽  
Manfred Berroth
Keyword(s):  
Group Delay ◽  
Supply Voltage ◽  
Input Voltage ◽  
Power Supply Voltage ◽  
Gain Bandwidth ◽  
Chip Area ◽  
Limiting Amplifier ◽  
Inductive Peaking ◽  
Bicmos Technology ◽  
Sige Bicmos

Abstract. This paper presents the design of a limiting amplifier with 1-to-3 fan-out implementation in a 0.13 µm SiGe BiCMOS technology and gives a detailed guideline to determine the circuit parameters of the amplifier for optimum high-frequency performance based on simplified gain estimations. The proposed design uses a Cherry-Hooper topology for bandwidth enhancement and is optimized for maximum group delay flatness to minimize phase distortion of the input signal. With regard to a high integration density and a small chip area, the design employs no passive inductors which might be used to boost the circuit bandwidth with inductive peaking. On a RLC-extracted post-layout simulation level, the limiting amplifier exhibits a gain-bandwidth-product of 14.6 THz with 56.6 dB voltage gain and 21.5 GHz 3 dB bandwidth at a peak-to-peak input voltage of 1.5 mV. The group delay variation within the 3 dB bandwidth is less than 0.5 ps and the power dissipation at a power supply voltage of 3 V including output drivers is 837 mW.

A low-phase noise D-band signal source based on 130 nm SiGe BiCMOS and 0.15 µm AlGaN/GaN HEMT technologies

2019 ◽  
Vol 11 (5-6) ◽  
pp. 456-465
Author(s):  
Thanh Ngoc Thi Do ◽  
Mingquan Bao ◽  
Zhongxia Simon He ◽  
Ahmed Hassona ◽  
Dan Kuylenstierna ◽  
...  
Keyword(s):  
Phase Noise ◽  
Output Power ◽  
Communication Systems ◽  
Signal Source ◽  
Limiting Amplifier ◽  
Gan Hemt ◽  
Data Rates ◽  
Sige Bicmos ◽  
Low Phase Noise ◽  
Band Signal

AbstractThis paper reports on a record-low-phase noise D-band signal source with 5 dBm output power, and 1.3 GHz tuning range. The source is based on the unconventional combination of a fundamental frequency 23 GHz oscillator in 150 nm AlGaN/GaN HEMT technology followed by a 130 nm SiGe BiCMOS MMIC including a sixtupler and an amplifier. The amplifier operates in compression mode as power-limiting amplifier, to equalize the source output power so that it is nearly independent of the oscillator's gate and drain bias voltages used for tuning the frequency of the source. The choice of using a GaN HEMT oscillator is motivated by the need for a low oscillator noise floor, which recently has been demonstrated as a bottle-neck for data rates in wideband millimeter-wave communication systems. The phase noise performance of this signal source is −128 dBc/Hz at 10 MHz-offset. To the best of the authors’ knowledge, this result is the lowest reported phase noise of D-band signal source.

scholarly journals Design of a Ka-Band U-Shaped Bandpass Filter with 20-GHz Bandwidth in 0.13-μm BiCMOS Technology

Electronics ◽  
2020 ◽  
Vol 9 (10) ◽  
pp. 1608
Author(s):  
Kai Men ◽  
Hang Liu ◽  
Kiat Seng Yeo
Keyword(s):  
Transmission Lines ◽  
Bandpass Filter ◽  
Ka Band ◽  
Transmission Zero ◽  
Lumped Element ◽  
Transmission Zeros ◽  
Bicmos Technology ◽  
Sige Bicmos ◽  
Chip Size ◽  
Lower Transmission

In this work, the design of a novel Ka-band miniaturized bandpass filter with broad bandwidth is demonstrated by using inversely coupled U-shaped transmission lines. In the proposed filter, two transmission zeros can be generated within a cascaded U-shaped structure and it can also be proven that, by inversely coupling two stacked U-shaped transmission lines, the notch frequency at the upper stopband can be shifted to a lower frequency, which results in a smaller chip size. The key parameters affecting the performance of the proposed filter are investigated in detail with the effective lumped-element circuit illustrated. Fabricated in a 0.13-μm SiGe BiCMOS process, the proposed filter achieves an insertion loss of 3.6 dB at a frequency of 28.75 GHz and the measured bandwidth is from 20.75 GHz to 41 GHz. The return loss is better than −10 dB from 20.5 GHz to 39 GHz. The lower transmission zero is located at 11.75 GHz with a suppression of 54 dB while the upper transmission zero is around 67 GHz with an attenuation of 34.6 dB. The measurement agrees very well with the simulation results and the overall chip size of the proposed filter is 176 × 269 μm2.

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