A NEW TUNABLE FLOATING CMOS FDNR AND ELLIPTIC FILTER APPLICATIONS

2010 ◽  
Vol 19 (08) ◽  
pp. 1641-1650 ◽  
Author(s):  
FIRAT KAÇAR

A new tunable CMOS FDNR circuit is proposed. The circuit is based on the transcapacitive gyrator approach with both transcapacitive stages realized by MOS transistors configuration. This FDNR element lends itself well to the design of low-pass ladder filters and its use will result in a more efficient integrated circuit implementation than filters that simulate floating inductors utilizing resistive gyrators. The applications of FDNR to realize a current-mode fifth-order elliptic filter and current mode sixth-order elliptic band-pass filter are given. The proposed FDNR is simulated using CMOS TSMC 0.35 μm technology. Simulation results are given to confirm the theoretical analysis.

Author(s):  
Dr. D. D. Mulajkar ◽  

A new electronically tunable current-mode third order filter is proposed in this paper. OP-AMP is used as an active building block. With current input the filter can realize band pass responses in current mode. The filter circuit realizes calculated transfer function. The other attractive features of the filter are a) Employment of minimum active and passive elements b) Responses are electronically tunable c) Low active and passive sensitivities d) Suitable for high frequency operation e) Ideal for integrated circuit implementation.


2014 ◽  
Vol 18 (2) ◽  
pp. 81 ◽  
Author(s):  
Dinesh Prasad ◽  
D. R. Bhaskar ◽  
M. Srivastava

This paper proposes a new single resistancecontrolled sinusoidal oscillator (SRCO) which employs only onevoltage differencing current conveyor (VDCC), two groundedresistors and two grounded capacitors. The presented circuitconfiguration offers the following advantageous features (i)explicit current-mode output with independent control ofcondition of oscillation (CO) and frequency of oscillation (FO) (ii)low active and passive sensitivities and (iii) a very good frequencystability. The proposed structure can also be configured as (a)trans-admittance low pass filter and band pass filter and (b)quadrature oscillator. The validity of the proposed SRCO,quadrature oscillator and trans-admittance low pass filter andband pass filter has been verified by PSPICE simulations usingTSMC CMOS 0.18μm process model parameters.


2015 ◽  
Vol 781 ◽  
pp. 168-171
Author(s):  
Ekkapong Saising ◽  
Thanate Pattanathadapong ◽  
Pipat Prommee

This paper presents the realization of CMOS-based current-mode Elliptic ladder band-pass filter by using doubly terminated Elliptic RLC ladder band-pass filter prototype [1], [2]. The proposed circuit contains lossless integrators, lossy integrators and multiple outputs current gains. The frequency response of the proposed circuit can be electronically tuned between 1 MHz and 100 MHz by adjusting bias current between 1μA and 1,000 μA. The proposed circuit uses 1.5 V power supply and 0.1 W power consumption. The passive elements that contained in the proposed filter are only grounded capacitors without using other passive elements that can make this filter suitable for integrated circuit. PSPICE simulation results are carried out by using TSMC 0.18 μm technology and agreed well with the theory.


2013 ◽  
Vol 22 (01) ◽  
pp. 1250071 ◽  
Author(s):  
ERKAN YUCE ◽  
SHAHRAM MINAEI ◽  
NORBERT HERENCSAR ◽  
JAROSLAV KOTON

In this paper, a new current-mode (CM) circuit for realizing all of the first-order filter responses is suggested. The proposed configuration contains low number of components, only two NMOS transistors both operating in saturation region, two capacitors and two resistors. Major advantages of the presented circuit are low voltage, low noise and high linearity. The proposed filter circuit can simultaneously provide both inverting and non-inverting first-order low-pass, high-pass and all-pass filter responses. Computer simulation results achieved through SPICE tool and experimental results are given as examples to demonstrate performance and effectiveness of the proposed topology.


2006 ◽  
Vol 15 (06) ◽  
pp. 849-860 ◽  
Author(s):  
SAMIR BEN SALEM ◽  
DORRA SELLAMI MASMOUDI ◽  
MOURAD LOULOU

In this paper, we introduce an implementation of a CCII-based grounded inductance operating in class AB. In order to get tunable characteristics of the design, a translinear CCII configuration is used as a basic block for its high level of controllability. A frequency characterization of the translinear CCII is done. In order to optimize its static and dynamic characteristics, an algorithmic driven methodology is developed ending to the optimal transistor geometries. The optimized CCII has a current bandwidth of 1.28 GHz and a voltage bandwidth of 5.48 GHz. It is applied in the simulated inductance design. We first consider the conventional topology of the grounded inductance based on the generalized impedance converter principle. Making use of the controllable series parasitic resistance at port X in translinear CCII, we design tunable characteristics of the inductance. The effect of current conveyor's nonidealities has been taken into account. A compensation strategy has been presented. It is based on the insertion of a high active CCII-based negative resistance and a very low passive resistance. The compensation strategy does not affect the inductance tuning process. Simulation results show that the proposed inductance can be tuned in the range [0.025 μH; 15.4 μH]. The simulated inductance has been applied in a fully integrated tunable high frequency band pass filter to illustrate the versatility of the circuit. The filter is electrically tunable by controlling the conveyor's bias current.


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