A 12-bit 350 MS/s Single-Channel Pipeline ADC with 75 dB SFDR in 0.18 μm BiCMOS

2019 ◽  
Vol 28 (03) ◽  
pp. 1950044
Author(s):  
Jie Sun ◽  
Jianhui Wu
Keyword(s):  
Power Efficiency ◽  
Single Channel ◽  
Pipeline Adc ◽  
Fully Integrated ◽  
Rejection Ratio ◽  
Power Supply Rejection Ratio ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Sige Bicmos ◽  
Supply Rejection

A 12-bit 350[Formula: see text]MS/s ADC with 75[Formula: see text]dB SFDR fabricated in 0.18[Formula: see text][Formula: see text]m SiGe BiCMOS process is presented. To improve the power efficiency, the ADC employs a novel residue amplifier (RA) by exploiting the hetero-junction bipolar transistor (HBT). We also propose a fast comparator to save time for the residue settling of pipeline stages. A fully integrated reference buffer with “negative bootstrap power” (NBP) is proposed to improve both high power supply rejection ratio (PSRR) and ground supply rejection ratio (GSRR). A bandgap reference (BGR) with ultra-low leakage current start-up loop is also presented. The measured results show that with Nyquist input, the SFDR achieves 75[Formula: see text]dB and 63[Formula: see text]dB SNDR up to 350[Formula: see text]MS/s and consumes 180[Formula: see text]mW (only ADC core) with 580[Formula: see text]fj/cov Waldon FOM.

scholarly journals A sub-1V high PSRR OpAmp based β-multiplier CMOS bandgap voltage reference with resistive division

2019 ◽  
Vol 15 (1) ◽  
pp. 155
Author(s):  
Anass SLAMTI ◽  
Youness MEHDAOUI ◽  
Driss CHENOUNI ◽  
Zakia LAKHLIAI
Keyword(s):  
Temperature Coefficient ◽  
Power Supply ◽  
Supply Voltage ◽  
Voltage Source ◽  
Voltage Reference ◽  
Voltage Range ◽  
Rejection Ratio ◽  
Power Supply Rejection Ratio ◽  
Bandgap Voltage Reference ◽  
Supply Rejection

<span lang="EN-US">A sub-1V opamp based β-multiplier CMOS bandgap voltage reference (BGVR) with high power supply rejection ratio (PSRR) and low temperature coefficient (TC) is proposed in this paper. A current mode regulator scheme is inserted to isolate the supply voltage of the operational amplifier (opamp) and the supply voltage of the BGVR core from the supply voltage source in order to reduce ripple sensitivity and to achieve a high PSRR. The proposed circuit is designed and simulated in 0.18-μm standard CMOS technology. The proposed voltage reference delivers an output voltage of 634.6mV at 27°C. Tthe measurement temperature coefficient is 22,3ppm/°C over temperature range -40°C to 140°C, power supply rejection ratio is -93dB at 10kHz and -71dB at 1MHz and a line regulation of 104μV/V is achieved over supply voltage range 1.2V to 1.8V. The layout area of the proposed circuit is 0.0337mm<sup>2</sup>. The proposed sub-1V bandgap voltage reference can be used as an internal voltage reference in low power LDO regulators and switching regulators.</span>

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