Design of a Tri-Band Doherty Amplifier Based on Generalized Impedance Inverter

2019 ◽  
Vol 28 (10) ◽  
pp. 1950170 ◽  
Author(s):  
Weimin Shi ◽  
Songbai He
Keyword(s):  
Power Amplifier ◽  
Power Amplifiers ◽  
Average Power ◽  
Measurement Results ◽  
Adjacent Channel ◽  
Before And After ◽  
Working Frequency ◽  
Doherty Power Amplifier ◽  
Doherty Amplifier ◽  
Multi Band

This paper introduces a methodology for implementing multi-band Doherty power amplifiers. Traditionally, a 90∘ impedance inverter line is required in Doherty architecture. In this contribution, a generalized impedance inverter line is utilized to construct multi-band Doherty power amplifiers. A tri-band Doherty power amplifier operating at 1.15, 1.85 and 2.55[Formula: see text]GHz is designed to validate the proposed method. Measurement results show the fabricated Doherty power amplifier achieves 6[Formula: see text]dB output back-off drain efficiencies of 62.3%, 49.3% and 50.5% at 1.15, 1.85 and 2.55[Formula: see text]GHz, respectively. The peaking output power of the fabricated tri-band Doherty power amplifier is 43.2, 43.7 and 43.8[Formula: see text]dBm with drain efficiencies of 64.5%, 62.2% and 64.5% at three working frequency points, respectively. Furthermore, when the designed Doherty power amplifier is driven by a 20[Formula: see text]MHz wideband LTE signal with peak-to-average-power ratio of 6.4[Formula: see text]dB, adjacent channel power ratios of [Formula: see text]29.4 and [Formula: see text]57.1[Formula: see text]dBc are achieved before and after digital pre-distortion at 1.85[Formula: see text]GHz.

Design of Unsymmetrical Doherty Power Amplifier for 460MHz LTE-Advanced Applications

2013 ◽  
Vol 347-350 ◽  
pp. 1768-1772
Author(s):  
Chuan Hui Ma ◽  
Wen Sheng Pan ◽  
You Xi Tang ◽  
Chao Jin Qing
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Continuous Wave ◽  
Average Output ◽  
Term Evolution ◽  
Lte Advanced ◽  
Adjacent Channel ◽  
Before And After ◽  
Doherty Power Amplifier

An unsymmetrical Doherty power amplifier (DPA) at 460MHz is presented in this paper. The carrier and peaking amplifier of the DPA, which base on two equal-sized devices, are matched with different networks to mitigate the performance degradation caused by the limited load modulation. Measured with continuous wave (CW), the unsymmetrical DPA saturates at an output power of 49.2dBm and achieves a drain efficiency of 51% at 6dB back-off. Using a one-carrier long term evolution advanced (LTE-Advanced) signal with 20MHz bandwidth, the unsymmetrical DPA exhibits a drain efficiency of 48.7% at an average output power of 42.1dBm, along with adjacent channel leakage ratio (ACLR) of-34.1dBc and-53.3dBc before and after digital pre-distortion (DPD), respectively.

scholarly journals A Wide-Band High-Gain Doherty Power Amplifier With Class-AB HEMT Amplifiers

2021 ◽  
Author(s):  
Pouya Jahanian ◽  
Azadeh Norouzi Kangarshahi
Keyword(s):  
Power Amplifier ◽  
Transmission Lines ◽  
Average Power ◽  
Wide Band ◽  
High Gain ◽  
Input Power ◽  
Power Ratio ◽  
Class Ab ◽  
Power Added Efficiency ◽  
Doherty Power Amplifier

Abstract In this paper, an attempt has been made to design a Doherty power amplifier (DPA) with high-gain and wide-band. For this purpose, two peak amplifiers are used to improve the performance of the main amplifier. Main and auxiliary amplifiers with the same structure to the class-AB type and by using micro-strip lines in place of input/output and load matching networks, transmission lines and inductors of drain and gate, that minimize the losses in the DPA. The current DPA is implemented with GaN_HEMT_CLF1G0530_100v transistor and Rogers4003 substrate, which for 1GHz frequency in 0.5-1.5GHz bandwidth will be able to be at P-1dB point (this point, input power as 30dBm and output power as 47.98dBm) increase Drain efficiency and Power added efficiency (PAE) to 81.95% and 80.73%, respectively. The DPA helps to expand the back-off region and extend the linearity region, so the Peak to average power ratio (PAPR) will be 5.21dB and the Adjacent channel power ratio (ACPR) as 58.7dBc. A gain of 17.06-17.92dB was also obtained, which is significant compared to the results of similar samples.

A planner Doherty power amplifier with harmonic suppression with open and short ended stubs

Frequenz ◽  
2021 ◽  
Vol 0 (0) ◽  
Author(s):  
Saeedeh Lotfi ◽  
Saeed Roshani ◽  
Sobhan Roshani ◽  
Maryam Shirzadian Gilan
Keyword(s):  
Power Amplifier ◽  
Power Divider ◽  
Harmonic Suppression ◽  
Power Added Efficiency ◽  
Main Amplifier ◽  
Inverse Topology ◽  
Doherty Power Amplifier ◽  
Amplifier Design ◽  
Doherty Amplifier ◽  
Class F

Abstract This paper presents a new Doherty power amplifier (DPA) with harmonics suppression. A Wilkinson power divider (WPD) with open-ended and short-ended stubs is designed to suppress unwanted signals. To design the power divider in the circuit of the DPA, even and odd mode analyses are utilized. The proposed design operates at range of 1.2–1.6 GHz. The linearity of the suggested DPA is increased about 6 dBm, in comparison with the main amplifier. The designed Doherty amplifier has a power added efficiency (PAE), drain efficiency (DE) and Gain about 60, 61% and 19 dB, respectively. The designed WPD suppresses 2nd up to 14th harmonics with more than 20 dB suppression level, which is useful for suppressing unwanted harmonics in DPA design. ATF-34143 transistors (pHEMT technology) are used for this DPA amplifier design. The main amplifier has class-F topology and class-F inverse topology is used for auxiliary amplifier.

scholarly journals Application of New Matching Technique in Doherty Amplifier

2013 ◽  
Vol 278-280 ◽  
pp. 1091-1094
Author(s):  
Jun Chen ◽  
Guo Qing Shen ◽  
Kai Xiong Su
Keyword(s):  
Low Power ◽  
Power Amplifier ◽  
Computer Software ◽  
High Linearity ◽  
Matching Technique ◽  
Power Operation ◽  
Doherty Power Amplifier ◽  
Doherty Amplifier

According to the shortage of the traditional offset line in Doherty power amplifier, a new offset line technique is proposed to match carrier amplifier with the load and to improve the performance of the Doherty amplifier. By simulation of the computer software, a higher efficiency is obtained using the new offset line comparing the two kinds of offset lines. The new offset line matching technique could be applied in the system with high linearity and low power operation.

Design strategy of concurrent multi‐band Doherty power amplifier

2015 ◽  
Vol 9 (12) ◽  
pp. 1313-1322 ◽  
Author(s):  
Robin Kalyan ◽  
Karun Rawat ◽  
Shiban Kishan Koul
Keyword(s):  
Power Amplifier ◽  
Design Strategy ◽  
Doherty Power Amplifier ◽  
Multi Band

scholarly journals Highly efficient 3-stage Doherty power amplifier using gate bias adaption

2010 ◽  
Vol 3 (1) ◽  
pp. 47-58 ◽  
Author(s):  
Ildu Kim ◽  
Junghwan Moon ◽  
Jungjoon Kim ◽  
Seunghoon Jee ◽  
Junghwan Son ◽  
...  
Keyword(s):  
Output Power ◽  
Power Amplifier ◽  
Peak Power ◽  
Average Power ◽  
Maximum Efficiency ◽  
System Specification ◽  
Average Output ◽  
Highly Efficient ◽  
Doherty Power Amplifier ◽  
Power Region

This paper demonstrates a highly efficient 3-stage Doherty power amplifier (PA) employing an envelope tracking (ET) technique. The ‘3-stage’ Doherty PA is the most efficient architecture for a high peak-to-average power ratio (PAPR) signal among the various Doherty PAs. However, because of the lower peaking biases than those of the ‘N-way’ Doherty PA, the proper load modulation is hard to be achieved. To get proper modulation, the peaking PAs' gate biases have been adaptively controlled using the ET technique, and the peak power and maximum efficiency characteristic along the backed-off output power region is successfully achieved. By ADS and Matlab simulations, the overall behavior of the 3-stage Doherty PA employing the ET technique has been fully analyzed. To maximize the overall efficiency of the proposed 3-stage Doherty PA, the unit PA has been designed using class F−1 PA. For verification, the amplifier is implemented using 5 W and 10 W PEP LDMOSFETs for the 802.16e mobile world interoperability for microwave access (WiMAX) at 1 GHz with a 8.5 dB PAPR. The measured drain efficiency of the proposed 3-stage Doherty PA is 55.5% at an average output power of 37 dBm, which is a 7.54 dB backed-off output power. The digital feedback predistortion (DFBPD) algorithm has been used to linearize the proposed PA considering the ET technique. After linearization, the −33.15 dB of relative constellation error (RCE) performance is achieved, satisfying the system specification. These results show that the 3-stage Doherty employing the ET technique and saturated PA is the most suitable PA for the highly efficient and linear transmitter.

Doherty Power Amplifier With Enhanced Efficiency at Extended Operating Average Power Levels

2013 ◽  
Vol 61 (12) ◽  
pp. 4179-4187 ◽  
Author(s):  
Ahmed Mohamed Mahmoud Mohamed ◽  
Slim Boumaiza ◽  
Raafat R. Mansour
Keyword(s):  
Power Amplifier ◽  
Average Power ◽  
Doherty Power Amplifier

scholarly journals A Review of Efficiency Improvement Techniques in Modern Communication Systems

2021 ◽  
Vol 23 (07) ◽  
pp. 656-658
Author(s):  
Peddi Saurabh ◽  
◽  
Poornima Asuti ◽  
Prof. Deepika P ◽  
◽  
...  
Keyword(s):  
Power Amplifier ◽  
Communication Systems ◽  
Research Trends ◽  
Efficiency Improvement ◽  
Operational Principle ◽  
Doherty Power Amplifier ◽  
Doherty Amplifier

This paper discusses Doherty Power Amplifier(DPA) and its evolution over the years. The basic operational principle of the Doherty amplifier and its defective behavior that has been originated by transistor characteristics will be presented. The different research trends, all aimed to improve the advantages of the Doherty scheme and to solve its inherent drawbacks, are discussed.

scholarly journals A Doherty Power Amplifier with Large Back-Off Power Range Using Integrated Enhancing Reactance

2018 ◽  
Vol 2018 ◽  
pp. 1-8
Author(s):  
Wa Kong ◽  
Jing Xia ◽  
Fan Meng ◽  
Chao Yu ◽  
Lixia Yang ◽  
...  
Keyword(s):  
Low Power ◽  
Power Amplifier ◽  
Impedance Matching ◽  
Dual Band ◽  
Matching Networks ◽  
Measurement Results ◽  
Linearity Improvement ◽  
Saturated Output Power ◽  
Doherty Power Amplifier ◽  
Power Region

A symmetric Doherty power amplifier (DPA) based on integrated enhancing reactance (IER) was proposed for large back-off applications. The IER was generated using the peaking amplifier with the help of a desired impedance transformation in the low-power region to enhance the back-off efficiency of the carrier amplifier. To convert the impedances properly, both in the low-power region and at saturation, a two-impedance matching method was employed to design the output matching networks. For verification, a symmetric DPA with large back-off power range over 2.2–2.5 GHz was designed and fabricated. Measurement results show that the designed DPA has the 9 dB back-off efficiency of higher than 45%, while the saturated output power is higher than 44 dBm over the whole operation bandwidth. When driven by a 20 MHz LTE signal, the DPA can achieve good average efficiency of around 50% with adjacent channel leakage ratio of about –50 dBc after linearization over the frequency band of interest. The linearity improvement of the DPA for multistandard wireless communication system was also verified with a dual-band modulated signal.

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