Boolean Difference Technique for Detecting All Missing Gate and Stuck-at Faults in Reversible Circuits

2019 ◽  
Vol 28 (12) ◽  
pp. 1950212
Author(s):  
Joyati Mondal ◽  
Bappaditya Mondal ◽  
Dipak Kumar Kole ◽  
Hafizur Rahaman ◽  
Debesh Kumar Das
Keyword(s):  
Emerging Technology ◽  
Fault Model ◽  
Cmos Circuit ◽  
Fault Models ◽  
Toffoli Gate ◽  
Optimal Test ◽  
Test Set ◽  
Reversible Circuits ◽  
Reversible Circuit ◽  
Reversible Gate

Quantum reversible circuit is a new emerging technology attracting the researchers. A reversible circuit is composed of reversible gates. One example of reversible gate is Toffoli gate. A Toffoli gate (also known as [Formula: see text]-CNOT) has two components — the control and the target. Initially, stuck-at fault and other fault models were used for modeling defects in quantum reversible circuits. Later, a new fault model known as missing gate fault model was introduced, which is more effective in capturing the errors in quantum reversible circuit. Boolean Difference is already a known technique to detect stuck-at faults in conventional CMOS circuit. In this paper, Boolean Difference method is applied to derive the test set for detecting each stuck-at fault and missing gate fault in a reversible circuit. Then an optimization algorithm is used to derive an optimal test set, which will detect all possible faults in a circuit. The method is valid also for other fault models.

DFT with Universal Test Set for All Missing Gate Faults in Reversible Circuits

2021 ◽  
Author(s):  
Joyati Mondal ◽  
Dipak Kumar Kole ◽  
Hafizur Rahaman ◽  
Debesh Kumar Das ◽  
Bhargab B. Bhattacharya
Keyword(s):  
Test Set ◽  
Universal Test ◽  
Reversible Circuits

Complete Test Set Generation for Control Flipping Faults in Reversible Circuits

2021 ◽  
pp. 345-355
Author(s):  
Mousum Handique ◽  
Amrit Prasad ◽  
Hiren Kumar Deva Sarma
Keyword(s):  
Test Set ◽  
Reversible Circuits ◽  
Complete Test

A Study on Fault Model and Fault-Tolerant Routing for Sensor Networks

2012 ◽  
Vol 182-183 ◽  
pp. 1265-1269
Author(s):  
Zu Ming Xu ◽  
Xiong Fu
Keyword(s):  
Sensor Networks ◽  
Routing Protocols ◽  
Energy Efficient ◽  
Fault Tolerant ◽  
Network Reliability ◽  
Fault Model ◽  
Cross Layer ◽  
Cross Layer Design ◽  
Fault Models ◽  
Energy Aware

Wireless sensor networks require energy-efficient and robust routingprotocols. Most routing protocols for sensor networks try to extendnetwork lifetime by minimizing the energy consumption, but have not taken the network reliability into account. In this paper, we analyze the fault models and propose an ENergy-aware FAult-tolerantRouting scheme, termed as ENFAR. Firstly a link-based uniform fault model is presented, and we adopt a cross-layer design to measurethe transmission delay so as to detect the failed nodes.

Research on the Gearbox Fault Signal Relation to the Sensitivity of Variable Working Conditions

2014 ◽  
Vol 494-495 ◽  
pp. 921-924 ◽  
Author(s):  
Guo Quan Ren ◽  
Wen Chen Zhang ◽  
Ben Li
Keyword(s):  
Fault Diagnosis ◽  
Working Conditions ◽  
Fault Model ◽  
Diagnostic Purpose ◽  
Variable Speed ◽  
Optimal Test ◽  
Vibration Signals ◽  
Design Load ◽  
System Vibration ◽  
Load Conditions

Established the gearbox fault model and simulated it at different load conditions view of the problem with gearbox experimental technique research under the variable speed and load conditions. The law between the changes of rotational speed and load with the system vibration signals was investigated and the corresponding optimal test fault condition was given. Based on this, validated the feasibility on fault diagnosis by increasing (decreasing) speed signal and found that the different load will have a different influence on the different fault signal. The different diagnostic purpose should be considered to design load conditions.

scholarly journals On the gate complexity of reversible circuits consisting of NOT, CNOT and 2-CNOT gates

2017 ◽  
Vol 27 (1) ◽  
Author(s):  
Dmitry V. Zakablukov
Keyword(s):  
Reversible Circuits ◽  
Reversible Circuit

AbstractThe paper is concerned with the problem of complexity of reversible circuits consisting of NOT, CNOT and 2-CNOT gates. For a reversible circuit implementing a map

scholarly journals Black box delay fault models for non-scan sequential circuits

2018 ◽  
Vol 15 (1) ◽  
pp. 237-256
Author(s):  
Eduardas Bareisa ◽  
Vacius Jusas ◽  
Kestutis Motiejunas ◽  
Liudas Motiejunas ◽  
Rimantas Seinauskas
Keyword(s):  
Fault Model ◽  
Black Box ◽  
Sequential Circuits ◽  
Fault Models ◽  
Delay Fault ◽  
Second Stage ◽  
Transition Faults ◽  
Transition Fault ◽  
Functional Delay ◽  
Two Stages

We presented nine new black box delay fault models for non-scan sequential circuits at the functional level, when the primary inputs and primary outputs are available only. We examined the suggested fault models in two stages. During the first stage of the experiment, we selected the best two fault models for further examination on the base of criterion proposed in the paper. During the second stage, we used the functional delay fault model and two black box delay fault models from the first stage for test selection. The comparison of fault coverages was carried out for transition faults. The obtained results demonstrate that transition fault coverages of tests selected based on proposed black box fault models are similar to coverages of tests selected based on functional delay fault model that uses the inner state of circuit.

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