Field-Effect Conductance Activation Energy in Polycrystalline Silicon Thin-Film Transistors after Bias Stress

1996 ◽  
Vol 35 (Part 1, No. 4A) ◽  
pp. 2081-2084 ◽  
Author(s):  
Seo-Yoon Kim ◽  
Yoon-Ho Song ◽  
Kee-Soo Nam ◽  
Choochon Lee
Keyword(s):  
Thin Film ◽  
Activation Energy ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Field Effect ◽  
Silicon Thin Film ◽  
Bias Stress

Degradation behavior and degradation mechanism of bridged-grain polycrystalline silicon thin film transistors under AC gate bias stress

2017 ◽  
Vol 32 (2) ◽  
pp. 91-96
Author(s):  
张猛 ZHANG Meng ◽  
夏之荷 XIA Zhi-he ◽  
周玮 ZHOU Wei ◽  
陈荣盛 CHEN Rong-sheng ◽  
王文 WONG Man ◽  
...  
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Degradation Mechanism ◽  
Gate Bias ◽  
Degradation Behavior ◽  
Silicon Thin Film ◽  
Bias Stress ◽  
Gate Bias Stress

Compressive Stressed P-Channel Polycrystalline-Silicon Thin-Film Transistors for High Field-Effect Mobility

2015 ◽  
Vol 36 (8) ◽  
pp. 793-795 ◽  
Author(s):  
Jae Hyo Park ◽  
Ki Hwan Seok ◽  
Hyung Yoon Kim ◽  
Sol Kyu Lee ◽  
Hee Jae Chae ◽  
...  
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Field Effect ◽  
High Field ◽  
Field Effect Mobility ◽  
Silicon Thin Film

P-channel Polycrystalline Silicon Thin Film Transistors on Steel Foil Substrates

2001 ◽  
Vol 664 ◽  
Author(s):  
Ming Wu ◽  
Sigurd Wagner
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Field Effect ◽  
Drain Current ◽  
Silicon Thin Film ◽  
Polysilicon Films ◽  
Source Voltage ◽  
Steel Substrates ◽  
Hydrogenated Amorphous

ABSTRACTWe fabricated self-aligned polycrystalline silicon (polysilicon) thin film transistors on flexible steel substrates. The polysilicon was formed by furnace crystallization of hydrogenated amorphous silicon at 950°C/20sec or 750°C/2min. The TFTs made from these polysilicon films have hole field effect mobilities in the linear regime of 22 cm2·V−1s−1 (950°C) and 14 cm2·V−1s−1 (750°C). The OFF current at 10 V drain-source voltage is 10−10A and the drain current ON/OFF ratio is ∼106.

Enhanced Negative Bias Stress Degradation in Multigate Polycrystalline Silicon Thin-Film Transistors

2017 ◽  
Vol 64 (10) ◽  
pp. 4363-4367 ◽  
Author(s):  
Dongli Zhang ◽  
Mingxiang Wang ◽  
Huaisheng Wang ◽  
Yilin Yang
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Negative Bias ◽  
Silicon Thin Film ◽  
Bias Stress ◽  
Stress Degradation

Anomalous on-current and subthreshold swing improvement in low-temperature polycrystalline-silicon thin-film transistors under Gate bias stress

2011 ◽  
Vol 98 (12) ◽  
pp. 122101 ◽  
Author(s):  
Chia-Sheng Lin ◽  
Ying-Chung Chen ◽  
Ting-Chang Chang ◽  
Fu-Yen Jian ◽  
Hung-Wei Li ◽  
...  
Keyword(s):  
Thin Film ◽  
Low Temperature ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Subthreshold Swing ◽  
Gate Bias ◽  
Silicon Thin Film ◽  
Bias Stress ◽  
Gate Bias Stress

Analysis of the activation energy of the subthreshold current in laser- and solid-phase-crystallized polycrystalline silicon thin-film transistors

2000 ◽  
Vol 77 (4) ◽  
pp. 576-578 ◽  
Author(s):  
L. Pichon ◽  
A. Mercha ◽  
R. Carin ◽  
O. Bonnaud ◽  
T. Mohammed-Brahim ◽  
...  
Keyword(s):  
Thin Film ◽  
Activation Energy ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Solid Phase ◽  
Silicon Thin Film ◽  
Subthreshold Current
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