Dummy-Gate Structure to Improve Turn-on Speed of Silicon-Controlled Rectifier (SCR) Device for Effective Electrostatic Discharge (ESD) Protection

2003 ◽  
Vol 42 (Part 2, No. 11B) ◽  
pp. L1366-L1368
Author(s):  
Ming-Dou Ker ◽  
Kuo-Chun Hsu
Keyword(s):  
Electrostatic Discharge ◽  
Turn On ◽  
Gate Structure ◽  
Esd Protection ◽  
Dummy Gate

scholarly journals CDM Protection Test Structure for I/O Cells in a Submicronic Technology

Electronics ◽  
2021 ◽  
Vol 10 (4) ◽  
pp. 443
Author(s):  
Mihaela-Daniela Dobre ◽  
Philippe Coll ◽  
Gheorghe Brezeanu
Keyword(s):  
Electrostatic Discharge ◽  
New Technology ◽  
Test Chip ◽  
Technology Node ◽  
Ground Resistance ◽  
Maximum Resistance ◽  
Device Model ◽  
Protection Method ◽  
Esd Protection ◽  
Protection Devices

This paper proposes an investigation of a CDM (charge device model) electrostatic discharge (ESD) protection method used in submicronic input–output (I/O) structures. The modeling of the commonly used ESD protection devices as well as the modeling of the breakdown caused by ESD is not accurate using traditional commercial tools, hence the need for test-chip implementation, whenever a new technology node is used in production. The proposed method involves defining, implementing, testing, and concluding on one test-chip structure named generically “CDM ground resistance”. The structure assesses the maximum ground resistance allowed for the considered technology for which CDM protection is assured. The findings are important because they will be actively used as CDM protection for all I/O structures developed in the considered submicronic technology node. The paper will conclude on the constraints in terms of maximum resistance of ground metal track allowed to be CDM protected.

Damage analysis in smart-power technology electrostatic discharge (ESD) protection devices

1999 ◽  
Vol 39 (6-7) ◽  
pp. 1143-1148 ◽  
Author(s):  
D. Pogany ◽  
N. Seliger ◽  
M. Litzenberger ◽  
H. Gossner ◽  
M. Stecher ◽  
...  
Keyword(s):  
Electrostatic Discharge ◽  
Damage Analysis ◽  
Smart Power ◽  
Esd Protection ◽  
Protection Devices

Design of Gate-Ground-NMOS-Based ESD Protection Circuits with Low Trigger Voltage, Low Leakage Current, and Fast Turn-On

ETRI Journal ◽  
2009 ◽  
Vol 31 (6) ◽  
pp. 725-731 ◽  
Author(s):  
Yong-Seo Koo ◽  
Kwangsoo Kim ◽  
Shihong Park ◽  
Kwidong Kim ◽  
Jong-Kee Kwon
Keyword(s):  
Leakage Current ◽  
Turn On ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Esd Protection ◽  
Protection Circuits

Reliability challenge of ESD protection: From planner SOI MOSFET to SOI FinFET

2017 ◽  
Vol 31 (19-21) ◽  
pp. 1740004 ◽  
Author(s):  
Yibo Jiang ◽  
Hui Bi ◽  
Liangwei Dong ◽  
Qinglong Li
Keyword(s):  
Electrostatic Discharge ◽  
Silicon On Insulator ◽  
Heat Conductor ◽  
Soi Mosfet ◽  
Novel Device ◽  
Thermal Distribution ◽  
Floating Base ◽  
Esd Protection ◽  
Tcad Simulation ◽  
Soi Technology

Implementation of Electrostatic Discharge (ESD) protection in Silicon on Insulator (SOI) technology is a challenge because of the inherent properties of poor heat conductor and heat trapping. In this paper, a novel device as ESD clamp is proposed as Fix-Base SOI FinFET clamp which addresses the troublesome problem of floating base. Moreover, its manufacturing process is compatible to the normal SOI process flow well. Finally, a detailed discussion including current density and thermal distribution are presented with the technique of 3D TCAD simulation.

Enhanced gated-diode-triggered silicon-controlled rectifier for robust electrostatic discharge (ESD) protection applications

2020 ◽  
Vol 29 (9) ◽  
pp. 098502
Author(s):  
Wenqiang Song ◽  
Fei Hou ◽  
Feibo Du ◽  
Zhiwei Liu ◽  
Juin J. Liou
Keyword(s):  
Electrostatic Discharge ◽  
Esd Protection

Augmented DTSCR With Fast Turn-On Speed for Nanoscale ESD Protection Applications

2020 ◽  
Vol 67 (3) ◽  
pp. 1353-1356
Author(s):  
Feibo Du ◽  
Wenqiang Song ◽  
Fei Hou ◽  
Jizhi Liu ◽  
Zhiwei Liu ◽  
...  
Keyword(s):  
Turn On ◽  
Esd Protection
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