Channel Recessed One Transistor Dynamic Random Access Memory with SiO$_{2}$/Si$_{3}$N$_{4}$/SiO$_{2}$ Gate Dielectric
Keyword(s):
1996 ◽
Vol 35
(Part 1, No. 2B)
◽
pp. 1086-1089
◽
1996 ◽
Vol 35
(Part 1, No. 9B)
◽
pp. 4976-4979
◽
2021 ◽
Vol 21
(8)
◽
pp. 4216-4222
2004 ◽
Vol 43
(5A)
◽
pp. 2457-2461
◽
1998 ◽
Vol 45
(6)
◽
pp. 1300-1309
◽
Keyword(s):
Keyword(s):
2007 ◽
Vol 11
(10)
◽
pp. 1391-1397
◽
1994 ◽
Vol 33
(Part 1, No. 8)
◽
pp. 4570-4575
◽
Keyword(s):