W as a Bit Line Interconnection in Capacitor-Over-Bit-line (COB) Structured Dynamic Random Access Memory (DRAM) and Feasible Diffusion Barrier Layer
1996 ◽
Vol 35
(Part 1, No. 2B)
◽
pp. 1086-1089
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2002 ◽
Vol 12
(5)
◽
pp. 373
◽
1999 ◽
Vol 17
(4)
◽
pp. 1470
◽
1997 ◽
Vol 15
(5)
◽
pp. 2781-2786
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Keyword(s):
1996 ◽
Vol 35
(Part 1, No. 9B)
◽
pp. 4976-4979
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2021 ◽
Vol 21
(8)
◽
pp. 4216-4222
2004 ◽
Vol 43
(5A)
◽
pp. 2457-2461
◽
1998 ◽
Vol 45
(6)
◽
pp. 1300-1309
◽
Keyword(s):
Keyword(s):