Threshold Voltage Control in PMOSFETs with Polysilicon or Fully-Silicided Gates on Hf-Based Gate Dielectric Using Controlled Lateral Oxidation

2019 ◽  
Vol 1 (5) ◽  
pp. 305-310 ◽  
Author(s):  
Vidya S. Kaushik ◽  
Erika Rohr ◽  
Sangjin Hyun ◽  
Stefan De Gendt ◽  
Sven Van Elshocht ◽  
...  
Keyword(s):  
Threshold Voltage ◽  
Gate Dielectric ◽  
Voltage Control ◽  
Lateral Oxidation

High temperature stability of Hf-based gate dielectric stacks with rare-earth oxide layers for threshold voltage control

2008 ◽  
Vol 92 (11) ◽  
pp. 112912 ◽  
Author(s):  
James M. LeBeau ◽  
Jesse S. Jur ◽  
Daniel J. Lichtenwalner ◽  
H. Spalding Craft ◽  
Jon-Paul Maria ◽  
...  
Keyword(s):  
Rare Earth ◽  
High Temperature ◽  
Threshold Voltage ◽  
Gate Dielectric ◽  
Temperature Stability ◽  
Voltage Control ◽  
Rare Earth Oxide ◽  
High Temperature Stability ◽  
Oxide Layers

Interface Engineering for Precise Threshold Voltage Control in Multilayer-Channel Thin Film Transistors

2016 ◽  
Vol 3 (24) ◽  
pp. 1600713 ◽  
Author(s):  
Ji Hoon Park ◽  
Fwzah H. Alshammari ◽  
Zhenwei Wang ◽  
Husam N. Alshareef
Keyword(s):  
Thin Film ◽  
Threshold Voltage ◽  
Thin Film Transistors ◽  
Voltage Control ◽  
Interface Engineering

Effect of High Temperature Forming Gas Annealing on Electrical Properties of 4H-SiC Lateral MOSFETs with Lanthanum Silicate and ALD SiO2 Gate Dielectric

2018 ◽  
Vol 924 ◽  
pp. 482-485
Author(s):  
Min Seok Kang ◽  
Kevin Lawless ◽  
Bong Mook Lee ◽  
Veena Misra
Keyword(s):  
Threshold Voltage ◽  
Interfacial Layer ◽  
Field Effect ◽  
Lanthanum Oxide ◽  
Gate Dielectric ◽  
High Mobility ◽  
High Threshold ◽  
Field Effect Mobility ◽  
The Impact ◽  
Lanthanum Silicate

We investigated the impact of an initial lanthanum oxide (La2O3) thickness and forming gas annealing (FGA) conditions on the MOSFET performance. The FGA has been shown to dramatically improve the threshold voltage (VT) stability of 4H-SiC MOSFETs. The FGA process leads to low VTshift and high field effect mobility due to reduction of the interface states density as well as traps by passivating the dangling bonds and active traps in the Lanthanum Silicate dielectrics. By optimizing the La2O3interfacial layer thickness and FGA condition, SiC MOSFETs with high threshold voltage and high mobility while maintaining minimal VTshift are realized.

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