scholarly journals Multiple Harmonics Fitting Algorithms Applied to Periodic Signals Based on Hilbert-Huang Transform

2013 ◽  
Vol 2013 ◽  
pp. 1-9 ◽  
Author(s):  
Hui Wang ◽  
Zhengshi Liu ◽  
Bin Zhu ◽  
Quanjun Song
Keyword(s):  
Signal Processing ◽  
Harmonic Distortion ◽  
Digital Signal ◽  
Periodic Signal ◽  
Sinusoidal Wave ◽  
Analog To Digital ◽  
Triangular Wave ◽  
Hilbert Huang Transform ◽  
Digital To Analog Converters ◽  
Periodic Signals

A new generation of multipurpose measurement equipment is transforming the role of computers in instrumentation. The new features involve mixed devices, such as kinds of sensors, analog-to-digital and digital-to-analog converters, and digital signal processing techniques, that are able to substitute typical discrete instruments like multimeters and analyzers. Signal-processing applications frequently use least-squares (LS) sine-fitting algorithms. Periodic signals may be interpreted as a sum of sine waves with multiple frequencies: the Fourier series. This paper describes a new sine fitting algorithm that is able to fit a multiharmonic acquired periodic signal. By means of a “sinusoidal wave” whose amplitude and phase are both transient, the “triangular wave” can be reconstructed on the basis of Hilbert-Huang transform (HHT). This method can be used to test effective number of bits (ENOBs) of analog-to-digital converter (ADC), avoiding the trouble of selecting initial value of the parameters and working out the nonlinear equations. The simulation results show that the algorithm is precise and efficient. In the case of enough sampling points, even under the circumstances of low-resolution signal with the harmonic distortion existing, the root mean square (RMS) error between the sampling data of original “triangular wave” and the corresponding points of fitting “sinusoidal wave” is marvelously small. That maybe means, under the circumstances of any periodic signal, that ENOBs of high-resolution ADC can be tested accurately.

scholarly journals Analog to Digital Converters (ADC): A Literature Review

2020 ◽  
Vol 184 ◽  
pp. 01025
Author(s):  
Hemlata Dalmia ◽  
Sanjeet K. Sinha
Keyword(s):  
Signal Processing ◽  
Low Power ◽  
Communication Technology ◽  
High Performance ◽  
Reducing Power ◽  
Digital Signal ◽  
Analog To Digital Converters ◽  
Analog To Digital ◽  
Cmos Scaling ◽  
Analog To Digital Conversion

The signal processing is advancing day by day as its needs and in wireline/wireless communication technology from 2G to 4G cellular communication technology with CMOS scaling process. In this context the high-performance ADCs, analog to digital converters have snatched the attention in the field of digital signal processing. The primary emphasis is on low power approaches to circuits, algorithms and architectures that apply to wireless systems. Different techniques are used for reducing power consumption by using low power supply, reduced threshold voltage, scaling of transistors, etc. In this paper, we have discussed the different types and different techniques used for analog to digital conversion of signals considering several parameters.

scholarly journals A review: algorithm used for beam forming systems

2017 ◽  
Vol 7 (1.2) ◽  
pp. 58
Author(s):  
Soma Pal ◽  
Azazul Haque
Keyword(s):  
Signal Processing ◽  
High Performance ◽  
Smart Antenna ◽  
Digital Signal ◽  
Beam Forming ◽  
Phased Array Antenna ◽  
Analog To Digital ◽  
Analog To Digital Conversion ◽  
Weight Calculation ◽  
Processing Techniques

Wireless communication uses a smart antenna to provide better coverage and capacity for the communication system. Main functions performed by the smart antenna are Direction of Arrival estimation (DOA) and beamforming (DBF). The beam forming is signal processing techniques which combine antenna array technology with high-performance up/down-conversion, analog to digital conversion and digital signal processing to provide receivers with very high spatial selectivity. This paper evaluates non-blind algorithm such as LMS, to compute the weight calculation for phased array antenna using Matlab Simulink.

scholarly journals Digital Signal Processing–based Dynamic Mass Measurement System for Egg Weighing Process

2017 ◽  
Vol 50 (4) ◽  
pp. 97-102 ◽  
Author(s):  
İsmail Yabanova
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
Mass Measurement ◽  
Digital Signal ◽  
Load Cell ◽  
Analog To Digital ◽  
Manufactured Products ◽  
Measurement Signal ◽  
Dynamic Weighing ◽  
To Receive

In this study, an electronic, mechanical and software system, where the weight measurements of eggs can be performed dynamically, is developed. As the speed is an important factor in the production sector, it is of significant importance that the manufactured products be weighed in a rapid and correct manner. For this reason, systems where the products are dynamically weighed are developed. However, as the products are weighed while they are moving in dynamic weighing systems, undesired disturbing effects occur on the measurement signal. The product weights must be measured at required speeds by eliminating this disturbing effect. Dynamic weighing is performed using a load cell. A digital signal processing–based card has been developed to measure the signal received from the load cell and to send it to the computer. The eggs are weighed while they are moving as they roll over the load cell. A program has been developed using the LabVIEW program to receive, filter and analyze the data read and sent to the computer by digital signal processing. In addition, the configuration adjustments of the integrated analog-to-digital converter that reads data from the load cell can also be performed thanks to this program.

scholarly journals Challenges in Clock Synchronization for On-Site Coding Digital Beamformer

2017 ◽  
Vol 2017 ◽  
pp. 1-8
Author(s):  
Satheesh Bojja Venkatakrishnan ◽  
Elias A. Alwan ◽  
John L. Volakis
Keyword(s):  
Clock Synchronization ◽  
Digital Signal ◽  
Data Converter ◽  
Analog To Digital ◽  
Synchronization Errors ◽  
Digital To Analog Converters ◽  
Field Programmable ◽  
Programmable Gate Arrays ◽  
Signal Synchronization ◽  
Signal Processors

Typical radio frequency (RF) digital beamformers can be highly complex. In addition to a suitable antenna array, they require numerous receiver chains, demodulators, data converter arrays, and digital signal processors. To recover and reconstruct the received signal, synchronization is required since the analog-to-digital converters (ADCs), digital-to-analog converters (DACs), field programmable gate arrays (FPGAs), and local oscillators are all clocked at different frequencies. In this article, we present a clock synchronization topology for a multichannel on-site coding receiver (OSCR) using the FPGA as a master clock to drive all RF blocks. This approach reduces synchronization errors by a factor of 8, when compared to conventional digital beamformer.

Efficient CPS Method for Improving the Sampling Resolution of Periodic Signals

2014 ◽  
Vol 1077 ◽  
pp. 235-240
Author(s):  
Yun Chi Yeh ◽  
Liuh Chii Lin ◽  
Yuan Dong Chen
Keyword(s):  
Phase Shift ◽  
Sampling Rate ◽  
Analog To Digital Converters ◽  
Experimental Result ◽  
Periodic Signal ◽  
Analog To Digital ◽  
Conversion Time ◽  
Periodic Signals

Based on existing analog to digital converters (ADC), this study proposes a simple and reliable controlled phase shift (CPS) method to improve the sampling resolution of a periodic signal. The proposed method uses phase shifted sampling sets of a sequence of sampled periods to increase sample resolution. When combining these sets, the period is virtually sampled with a higher number of samples. The lower sampling rate (per period) alleviates the requirements to be imposed on the conversion time of the ADC. Under the original conversion time of ADC, the proposed method can provide more sampled signals. Experimental result shows the proposed CPS method can improve the sampling resolution of periodic signals.

scholarly journals TEACHING DELTA-SIGMA SIGNAL CONVERSION IN AN INTERFACING COURSE

2015 ◽  
Author(s):  
Witold Kinsner
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
Digital Signal ◽  
The Other ◽  
Original Signal ◽  
New Approach ◽  
Analog To Digital ◽  
Signal Conversion ◽  
Delta Sigma ◽  
Low Pass

Conversion of signals is fundamental to theinterfacing of embedded systems. Such signal conversionsinclude (i) analog-to digital (A/D) in order to translate ananalog form of the signal to its sampled and quantized formfor digital signal processing, (ii) digital-to-analog (D/A) inorder to translate the digital samples to a correspondingboxcar signal for further low-pass filtering and recovery ofthe original signal, and (iii) digital-to-digital (D/D) toachieve new desired properties of the data.This paper focuses on teaching the delta-sigma (ΔΣ)A/D conversion that is often omitted from an interfacingcourse because it appears to be a difficult topic tocomprehend and to teach. This new approach links the newΔΣ conversion to the other classes of A/D conversiontechniques explicitly, thus unifying and simplifying theteaching of signal conversions.

scholarly journals Digital Signal Processing Algorithm for Measurement of Settling Time of High-Resolution High-Speed DACs

2019 ◽  
Vol 19 (3) ◽  
pp. 86-92
Author(s):  
Rokas Kvedaras ◽  
Vygaudas Kvedaras ◽  
Tomas Ustinavičius ◽  
Ričardas Masiulionis
Keyword(s):  
Signal Processing ◽  
Digital Signal Processing ◽  
Measurement Errors ◽  
High Speed ◽  
Digital Signal ◽  
Settling Time ◽  
Processing Algorithm ◽  
Signal Processing Algorithm ◽  
Digital To Analog Converters ◽  
Digital Signal Processing Algorithm

Abstract The paper presents the developed complex Digital Signal Processing algorithm for the reduction of white and 1/f noise and processing of the measurement signals of the Settling Time Measurement of the Digital-to-Analog Converters. The results show that the proposed DSP algorithm ensures 100-fold suppression of the white noise and 1/f noise. It was shown that it is possible to measure settling times of highspeed DACs (up to 16-17 Bits) with readout levels of ± 0.5 LSB while measurement errors do no exceed ± 1.4 ns.

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