An Architecture of 2-Dimensional 4-Dot 2-Electron QCA Full Adder and Subtractor with Energy Dissipation Study

Quantum-dot cellular automata (QCA) is the beginning of novel technology and is capable of an appropriate substitute for orthodox semiconductor transistor technology in the nanoscale extent. A competent adder and subtractor circuit can perform a substantial function in devising arithmetic circuits. The future age of digital techniques will exercise QCA as preferred nanotechnology. The QCA computational procedures will be simplified with an effective full adder and subtractor circuit. The deficiencies of variations and assembly still endure as a setback in QCA based outlines, and being capricious and inclined to error is the limitation of these circuits. In this study, a new full adder and subtractor design using unique 3-input XOR gate with cells redundancy is proposed. This designs can be utilized to form different expedient QCA layouts. The structures are formed in a single layer deprived of cross-wiring. Besides, this study is directed to the analysis of the functionality and energy depletion possessions of the outlined full adder and subtractor circuits. For the first time, QCADesigner-Energy (QD-E) version 2.0.3 tool is utilized to find the overall depleted energy. The attained effects with QCADesigner have verified that the outlined design has enhanced functioning in terms of intricacy, extent, and latency in contrast to the earlier designs. Moreover, the redundant form of full adder and subtractor has uncomplicated and robust arrangement competing typical styles.

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Designing single layer counter in quantum-dot cellular automata with energy dissipation analysis

Ain Shams Engineering Journal ◽

10.1016/j.asej.2017.05.010 ◽

2018 ◽

Vol 9 (4) ◽

pp. 2641-2648 ◽

Cited By ~ 9

Author(s):

Md. Abdullah-Al-Shafi ◽

Ali Newaz Bahar ◽

Md. Ahsan Habib ◽

Mohammad Maksudur Rahman Bhuiyan ◽

Firdous Ahmad ◽

...

Keyword(s):

Energy Dissipation ◽

Cellular Automata ◽

Quantum Dot ◽

Single Layer ◽

Quantum Dot Cellular Automata

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Rotated majority gate-based 2n-bit full adder design in quantum-dot cellular automata nanotechnology

Circuit World ◽

10.1108/cw-06-2020-0120 ◽

2021 ◽

Vol ahead-of-print (ahead-of-print) ◽

Author(s):

Sankit Kassa ◽

Prateek Gupta ◽

Manoj Kumar ◽

Thompson Stephan ◽

Ramani Kannan

Keyword(s):

Energy Dissipation ◽

Cellular Automata ◽

Quantum Dot ◽

Circuit Design ◽

Mathematical Proof ◽

Average Energy ◽

Full Adder ◽

Majority Gate ◽

Content Type ◽

Quantum Dot Cellular Automata

Purpose In nano-scale-based very large scale integration technology, quantum-dot cellular automata (QCA) is considered as a strong and capable technology to replace the well-known complementary metal oxide semiconductor technology. In QCA technique, rotated majority gate (RMG) design is not explored greatly, and therefore, its advantages compared to original majority gate are unnoticed. This paper aims to provide a thorough observation at RMG gate with its capability to build robust circuits. Design/methodology/approach This paper presents a new methodology for structuring reliable 2n-bit full adder (FA) circuit design in QCA utilizing RMG. Mathematical proof is provided for RMG gate structure. A new 1-bit FA circuit design is projected here, which is constructed with RMG gate and clock-zone-based crossover approach in its configuration. Findings A new structure of a FA is projected in this paper. The proposed design uses only 50 number of QCA cells in its implementation with a latency of 3 clock zones. The proposed 1-bit FA design conception has been checked for its structure robustness by designing various 2, 4, 8, 16, 32 and 64-bit FA designs. The proposed FA designs save power from 46.87% to 25.55% at maximum energy dissipation of circuit level, 39.05% to 23.36% at average energy dissipation of circuit-level and 42.03% to 37.18% at average switching energy dissipation of circuit level. Originality/value This paper fulfills the gape of focused research for RMG with its detailed mathematical modeling analysis.

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A full adder structure without cross-wiring in quantum-dot cellular automata with energy dissipation analysis

The Journal of Supercomputing ◽

10.1007/s11227-017-2206-4 ◽

2017 ◽

Vol 74 (5) ◽

pp. 1994-2005 ◽

Cited By ~ 34

Author(s):

Saeed Rasouli Heikalabad ◽

Mazaher Naji Asfestani ◽

Mehdi Hosseinzadeh

Keyword(s):

Energy Dissipation ◽

Cellular Automata ◽

Quantum Dot ◽

Full Adder ◽

Quantum Dot Cellular Automata

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An Ultra-Low-Power Five-Input Majority Gate in Quantum-Dot Cellular Automata

Journal of Circuits System and Computers ◽

10.1142/s0218126620501765 ◽

2020 ◽

Vol 29 (11) ◽

pp. 2050176

Author(s):

Feifei Deng ◽

Guangjun Xie ◽

Shaowei Wang ◽

Xin Cheng ◽

Yongqiang Zhang

Keyword(s):

Cellular Automata ◽

Power Consumption ◽

Low Power ◽

Power Dissipation ◽

Single Layer ◽

Full Adder ◽

Majority Gate ◽

Ultra Low Power ◽

Quantum Dot Cellular Automata ◽

Number Of Cells

Quantum-dot cellular automata (QCA) is a highly attractive alternative to CMOS for future digital circuit design, relying on its high-performance and low-power-consumption features. This paper analyzes and compares previously published five-input majority gates. These designs do not perform well in terms of physical properties, especially concerting power consumption. Therefore, an ultra-low-power five-input majority gate in one layer is proposed, which uses a minimum number of cells and smaller area, and achieves the expected highly polarized output compared with previous designs. In order to evaluate its practicability, a new one-bit coplanar full-adder is proposed. The analysis results show that this full-adder performs well compared with existing multilayer and single-layer designs. The number of cells of the proposed design is reduced by 7.14% to get the same area and clock delay compared with the best coplanar full-adder. In addition, its power dissipation is also reduced by 9.28% at 0.5[Formula: see text], 11.09% at 1[Formula: see text] and 12.66% at 1.5[Formula: see text] in terms of average energy dissipation compared with the best single-layer design. QCADesigner tool is used to verify the simulation results of the proposed designs and QCAPro tool is used to evaluate the power dissipation of all considered designs.

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Design and Implementation of New Coplanar FA Circuits without NOT Gate and Based on Quantum-Dot Cellular Automata Technology

Applied Sciences ◽

10.3390/app112412157 ◽

2021 ◽

Vol 11 (24) ◽

pp. 12157

Author(s):

Mohsen Vahabi ◽

Pavel Lyakhov ◽

Ali Newaz Bahar ◽

Khan A. Wahid

Keyword(s):

Cellular Automata ◽

Quantum Dot ◽

Logic Gate ◽

Logic Gates ◽

Full Adder ◽

Cmos Technology ◽

Ultra Low Power ◽

Xor Gate ◽

Design Complexity ◽

Quantum Dot Cellular Automata

The miniaturization of electronic devices and the inefficiency of CMOS technology due to the development of integrated circuits and its lack of responsiveness at the nanoscale have led to the acquisition of nanoscale technologies. Among these technologies, quantum-dot cellular automata (QCA) is considered one of the possible replacements for CMOS technology because of its extraordinary advantages, such as higher speed, smaller area, and ultra-low power consumption. In arithmetic and comparative circuits, XOR logic is widely used. The construction of arithmetic logic circuits using AND, OR, and NOT logic gates has a higher design complexity. However, XOR gate design has a lower design complexity. Hence, the efficient and optimized XOR logic gate is very important. In this article, we proposed a new XOR gate based on cell-level methodology, with the expected output achieved by the influence of the cells on each other; this design method caused less delay. However, this design was implemented without the use of inverter gates and crossovers, as well as rotating cells. Using the proposed XOR gate, two new full adder (FA) circuits were designed. The simulation results indicate the advantage of the proposed designs compared with previous structures.

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Design and Implementation of Novel Efficient Full Adder/Subtractor Circuits Based on Quantum-Dot Cellular Automata Technology

Applied Sciences ◽

10.3390/app11188717 ◽

2021 ◽

Vol 11 (18) ◽

pp. 8717

Author(s):

Mohsen Vahabi ◽

Pavel Lyakhov ◽

Ali Newaz Bahar

Keyword(s):

Cellular Automata ◽

Quantum Dot ◽

High Speed ◽

Single Layer ◽

Building Blocks ◽

Full Adder ◽

Cmos Technology ◽

Quantum Dot Cellular Automata ◽

Potential Alternative ◽

Nanoscale Level

One of the emerging technologies at the nanoscale level is the Quantum-Dot Cellular Automata (QCA) technology, which is a potential alternative to conventional CMOS technology due to its high speed, low power consumption, low latency, and possible implementation at the atomic and molecular levels. Adders are one of the most basic digital computing circuits and one of the main building blocks of VLSI systems, such as various microprocessors and processors. Many research studies have been focusing on computable digital computing circuits. The design of a Full Adder/Subtractor (FA/S), a composite and computing circuit, performing both the addition and the subtraction processes, is of particular importance. This paper implements three new Full Adder/Subtractor circuits with the lowest number of cells, lowest area, lowest latency, and a coplanar (single-layer) circuit design, as was shown by comparing the results obtained with those of the best previous works on this topic.

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