A novel multilevel inverter with reduced switch count

This paper presents a multilevel inverter with reduced number of switches to produce a five level output. PWM technique (pulse width modulation) has been used to trigger the MLI switches. It gives reduced harmonic. This proposed topology is connected with R-load and RL-load. Four signals are generated for switching on the multilevel inverter (MLI) switches by comparing four level triangular waveform with sine wave. In this proposed topology two switches are reduced from the conventional Cascaded five level inverter. The simulation analysis has been done by MATLAB/SIMULINK.

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Hardware implementation of single phase three-level cascaded h-bridge multilevel inverter using sinusoidal pulse width modulation

International Journal of Power Electronics and Drive Systems (IJPEDS) ◽

10.11591/ijpeds.v10.i2.pp625-635 ◽

2019 ◽

Vol 10 (2) ◽

pp. 625

Author(s):

A. Shamsul Rahimi A. Subki ◽

Mohd Zaidi Mohd Tumari ◽

Wan Norhisyam Abd Rashid ◽

Aiman Zakwan Jidin ◽

Ahmad Nizammuddin Muhammad Mustafa

Keyword(s):

Pulse Width ◽

Output Voltage ◽

Single Phase ◽

Hardware Implementation ◽

Pulse Width Modulation ◽

Sine Wave ◽

Multilevel Inverter ◽

Square Wave ◽

Output Waveform ◽

Sinusoidal Pulse Width Modulation

In this paper a hardware implementation of single-phase cascaded H-bridge three level multilevel inverter (MLI) using sinusoidal pulse width modulation (SPWM) is presented. There are a few interesting features of using this configuration, where less component count, less switching losses, and improved output voltage/current waveform. The output of power inverter consists of three form, that is, square wave, modified square wave and pure sine wave. The pure sine wave and modified square wave are more expensive than square wave. The focus paper is to generate a PWM signal which control the switching of MOSFET power semiconductor. The sine wave can be created by using the concept of Schmitt-Trigger oscillator and low-pass filter topology followed by half of the waveform will be eliminated by using the circuit of precision half-wave rectifier. Waveform was inverted with 180º by circuit of inverting op-amp amplifier in order to compare saw-tooth waveform. Two of PWM signal were produced by circuit of PWM and used digital inverter to invert the two PWM signal before this PWM signal will be passed to 2 MOSFET driver and a 3-level output waveform with 45 Hz was produced. As a conclusion, a 3-level output waveform is produced with output voltage and current recorded at 22.5 Vrms and 4.5 Arms. The value of measured resistance is 0.015 Ω that cause voltage drop around 0.043 V. Based on the result obtained, the power for designed inverter is around 100W and efficiency recorded at 75%.

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Comparative Study of Three Different Topologies of Five-Level Inverter with SPWM Modulation Technique

International Journal of Power Electronics and Drive Systems (IJPEDS) ◽

10.11591/ijpeds.v8.i4.pp1612-1621 ◽

2017 ◽

Vol 8 (4) ◽

pp. 1612

Author(s):

Nabil Farah ◽

Jurifa Bt. Mat Lazi ◽

MHN Talib

Keyword(s):

Comparative Study ◽

High Power ◽

Pulse Width ◽

Pulse Width Modulation ◽

Multilevel Inverter ◽

Matlab Simulink ◽

Number Of Components ◽

Switching Losses ◽

Power Application ◽

Sinusoidal Pulse Width Modulation

Multilevel Inverter (MLI) has attracted a great attention by different researchers and industries due to its capability in handling high power application and minimizing the harmonics contents in the output. This study propose three different topologies of MLI (5-level) which are Cascaded H-Bridge Multilevel Inverter (CHMLI) ,Diode Clamped Multilevel Inverter and Flying Capacitor Multilevel Inverter (FCMLI) .These three topologies have been modelled in MATLAB/SIMULINK and compared in terms of THD and number of components used. Sinusoidal Pulse Width Modulation is utilized to control both of the topologies with same DC source. The results showed that ,CHMLI is superior compared to DCMLI and FCMLI in which the CHMLI produce 26.29% THD while DCMLI and FCMLI produce 29.14% and 33.53% respectively .Moreover less components and switching losses is obtained when using the CHMLI.

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FPGA based Implementation of Symmetrical Reduced Switch Multilevel Inverter

International Journal of Reconfigurable and Embedded Systems (IJRES) ◽

10.11591/ijres.v6.i1.pp28-35 ◽

2018 ◽

Vol 6 (1) ◽

pp. 28

Author(s):

K. Venkataramanan ◽

B. Shanthi ◽

T. S. Sivakumaran

Keyword(s):

Real Time ◽

Pulse Width ◽

Pulse Width Modulation ◽

Multilevel Inverter ◽

Performance Parameters ◽

Matlab Simulink ◽

The Real ◽

Modulation Techniques ◽

Switching Strategies

Multilevel inverter has become more popular and attractive for drive applications. Among the various modulation techniques, Carrier based techniques has been commonly used because of their simplicity and flexibility. This paper presents the comparisons of bipolar multicarrier pulse width modulation for the new symmetrical multilevel inverter. The performance parameters of new multilevel inverter were analyzed through various switching strategies. The detailed study has been carried out by MATLAB/SIMULINK. The real time implementation was carried out using FPGA. The results of both simulation and experimentation were compared.

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A novel impedance source fed H-type flying capacitor multilevel inverter

International Journal of Advances in Applied Sciences ◽

10.11591/ijaas.v8.i3.pp225-231 ◽

2019 ◽

Vol 8 (3) ◽

pp. 225

Author(s):

Chinnapettai Ramalingam Balamurugan ◽

P. Vijayakumar ◽

T. Sengolrajan

Keyword(s):

Amplitude Modulation ◽

Pulse Width ◽

Pulse Width Modulation ◽

Harmonic Distortion ◽

Sine Wave ◽

Multilevel Inverter ◽

Modulation Index ◽

Performance Indices ◽

Third Harmonic ◽

Simulation Results

In this paper, simulation using MATLAB/SIMULINK is performed with bipolar triangular fixed amplitude multi-carrier Phase Disposition (PD) PWM strategy with sine wave, Third Harmonic Injection, 60 degree Pulse Width Modulation and stepped wave reference for the chosen impedance Source based H-Type flying capacitor Multilevel Inverter (ISBH-Type FCMLI). The root means square value of the fundamental component and Total Harmonic Distortion of the output voltage which are the most important performance indices for the chosen inverter topologies are evaluated presented and compared for various references through duty ratios. From the simulation results it is observed that for various references the THD is almost similar but the root mean square value in terms of voltage is more for THI, 60 degree PWM and stepped wave reference with phase disposition strategy. The results are obtained for ma (amplitude modulation index) < 1 (under amplitude modulation index), ma=1 (normal amplitude modulation index) and ma > 1 (over amplitude modulation index).

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