scholarly journals New Dead-Time Compensation Method of Power Inverter using Carrier Based Sinusoidal Pulse-Width Modulation

Author(s):  
Suroso Suroso ◽  
Daru Tri Nugroho ◽  
Toshihiko Noguchi

<p>A new dead-time compensation method of power inverter circuits is suggested and presented in this paper. The proposed method utilizes carrier based sinusoidal pulse width modulation technique to produce driving signals of the inverter power switches with dead-time correction capability. The proposed method able to eliminate dead-time effects such as reducing the waveform distortion of the inverter output current, and increasing the fundamental component amplitude of output current. An analysis of the proposed method is presented. Some computer simulations were carried out to investigate the principle operation, and to test performance of the new method. The developed method was validated through experimental test of H-bridge voltage source inverter circuits. The data obtained from the computer simulation and prototype experiments have confirmed that that the proposed method worked well compensating the dead-time in the voltage source power inverter circuits.</p>

Author(s):  
Qasim Al Azze ◽  
Mohammed Hasan Ali

<p>The paper presents a low-cost hardware in the loop based on Arduino. Sinusoidal Pulse Width Modulation (SPWM) designing, analyzing, and implementation is experimented as hardware in the loop. Sinusoidal Pulse Width Modulation implementation via MATLAB\Simulation demonstrates in this work. In this paper, Arduino Mega2560 platform, microcontroller, introduce as hardware. A comparative study of the both techniques is presented. Arduino interfaces with PC Target MATLAB environment. Three phases Voltage Source Inverter directs by the generated pulses that loads with three phases RLC. The obtaining output current and voltage waveform of RLC load of Hardware-in-the-Loop validates to the MATLAB\simulation output waveform. The compering shows the output waveforms are primarily having the same pattern. Arduino consider as the lost cost as microcontroller which could be used in real application.</p>


Electronics ◽  
2020 ◽  
Vol 9 (12) ◽  
pp. 2195
Author(s):  
Jin-Wook Kang ◽  
Seung-Wook Hyun ◽  
Yong Kan ◽  
Hoon Lee ◽  
Jung-Hyo Lee

This paper proposes a novel pulse width modulation (PWM) for a three-level neutral point clamped (NPC) voltage source inverter (VSI). When the conventional PWM method is used in three-level NPC VSI, dead time is required to prevent a short circuit caused by the operation of complementary devices on the upper and lower arms. However, current distortion is increased because of the dead time and it can also cause a voltage unbalance in the dc-link. To solve this problem, we propose a zero dead-time width modulation (ZDPWM) which does not require dead time used in complementary operation. The proposed technique applies the offset voltage to the space vector pulse width modulation (SVPWM) reference voltage for the same modulation index (MI) as the conventional SVPWM, but any complementary switching operation needs dead time. In addition, the proposed method is divided into four operation sections using the reference voltage and phase current to operate switching devices which flow the current depending on the section. This ZDPWM method is simply implemented by carrier and reference voltage that reduce the current distortion, because complementary operation that needs dead time is not implemented. However, the operation section is delayed due to the sampling delay that occurs during the experiment. Therefore, in this paper, we conduct a modeling of sampling delay to improve the delay of operation section. To verify the principle and feasibility of the proposed ZDPWM method, a simulation and experiment are implemented.


2012 ◽  
Vol 546-547 ◽  
pp. 1050-1055
Author(s):  
Bao Lian Liu ◽  
De Fei Jin

A space vector pulse-width modulation (SVPWM) strategy was developed to solve the failure of traditional SVPWM. A two-phase modulation method is adopted basing on the analyses of traditional SVPWM to select the null switching state in each sector according to the power factor angle. As a result, when the current is crossing zero, the corresponding phase does not commute and dead-time compensation is avoided; and when the current is nearing the peak, the corresponding phase also don’t commute, which leads to lower switching losses. The simulation and experimental results validate that the proposed strategy can effectively improve the current wave, minimize the current distortion and reduce the switching losses. Furthermore, the algorithm is easy to implement.


Energies ◽  
2020 ◽  
Vol 13 (17) ◽  
pp. 4352 ◽  
Author(s):  
Riccardo Mandrioli ◽  
Aleksandr Viatkin ◽  
Manel Hammami ◽  
Mattia Ricco ◽  
Gabriele Grandi

A complete analysis of the ac output current ripple in four-leg voltage source inverters considering multiple modulation schemes is provided. In detail, current ripple envelopes and peak-to-peak profiles have been determined in the whole fundamental period and a comprehensive method providing the current ripple rms has been achieved, all of them as a function of the modulation index. These characteristics have been determined for both phase and neutral currents, considering the most popular common-mode injection schemes. Particular attention has been paid to the performance of discontinuous pulse width modulation (DPWM) methods, including DPWMMAX and DPWMMIN, and their four most popular combinations DPWM0, DPWM1, DPWM2, and DPWM3. Furthermore, a comparison with a few continuous techniques (sinusoidal, centered pulse width modulations, and third harmonic injection) has been provided as well. Moreover, the average switching frequency and switching losses are analyzed, determining which PWM technique ensures minimum output current ripple within the linear modulation range at different assumptions. Numerical simulations and laboratory tests have been conducted to extensively verify all the analytical claims for all the considered PWM injections.


Sign in / Sign up

Export Citation Format

Share Document