scholarly journals A Comprehensive AC Current Ripple Analysis and Performance Enhancement via Discontinuous PWM in Three-Phase Four-Leg Grid-Connected Inverters

Energies ◽  
2020 ◽  
Vol 13 (17) ◽  
pp. 4352 ◽  
Author(s):  
Riccardo Mandrioli ◽  
Aleksandr Viatkin ◽  
Manel Hammami ◽  
Mattia Ricco ◽  
Gabriele Grandi
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Performance Enhancement ◽  
Voltage Source ◽  
Complete Analysis ◽  
Switching Frequency ◽  
Output Current ◽  
Voltage Source Inverters ◽  
Switching Losses ◽  
Current Ripple

A complete analysis of the ac output current ripple in four-leg voltage source inverters considering multiple modulation schemes is provided. In detail, current ripple envelopes and peak-to-peak profiles have been determined in the whole fundamental period and a comprehensive method providing the current ripple rms has been achieved, all of them as a function of the modulation index. These characteristics have been determined for both phase and neutral currents, considering the most popular common-mode injection schemes. Particular attention has been paid to the performance of discontinuous pulse width modulation (DPWM) methods, including DPWMMAX and DPWMMIN, and their four most popular combinations DPWM0, DPWM1, DPWM2, and DPWM3. Furthermore, a comparison with a few continuous techniques (sinusoidal, centered pulse width modulations, and third harmonic injection) has been provided as well. Moreover, the average switching frequency and switching losses are analyzed, determining which PWM technique ensures minimum output current ripple within the linear modulation range at different assumptions. Numerical simulations and laboratory tests have been conducted to extensively verify all the analytical claims for all the considered PWM injections.

Synchronized Symmetrical Bus-Clamping PWM Strategies for Three Level Inverter: Applications to Low Switching Frequencies

2011 ◽  
Vol 12 (2) ◽  
Author(s):  
Sreenivasappa Bhupasandra Veeranna ◽  
Udaykumar R Yaragatti ◽  
Abdul R Beig
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
High Performance ◽  
Pulse Width Modulation ◽  
Industrial Applications ◽  
Voltage Source ◽  
Switching Frequency ◽  
Space Vector ◽  
Digital Implementation ◽  
Switching Losses

The digital control of three-level voltage source inverter fed high power high performance ac drives has recently become a popular in industrial applications. In order to control such drives, the pulse width modulation algorithm needs to be implemented in the controller. In this paper, synchronized symmetrical bus-clamping pulse width modulation strategies are presented. These strategies have some practical advantages such as reduced average switching frequency, easy digital implementation, reduced switching losses and improved output voltage quality compared to conventional space vector pulse width modulation strategies. The operation of three level inverter in linear region is extended to overmodulation region. The performance is analyzed in terms THD and fundamental output voltage waveforms and is compared with conventional space vector PWM strategies and found that switching losses can be minimized using bus-clamping strategy compared to conventional space vector strategy. The proposed method is implemented using Motorola Power PC 8240 processor and verified on a constant v/f induction motor drive fed from IGBT based inverter.

scholarly journals FPGA Techniques Based New Hybrid Modulation Strategies for Voltage Source Inverters

2015 ◽  
Vol 2015 ◽  
pp. 1-6 ◽  
Author(s):  
L. U. Sudha ◽  
J. Baskaran ◽  
S. A. Elankurisil
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Harmonic Distortion ◽  
Performance Criterion ◽  
Voltage Source ◽  
Voltage Source Inverters ◽  
Hybrid Modulation ◽  
Switching Losses ◽  
Harmonic Pollution ◽  
Modulation Methods

This paper corroborates three different hybrid modulation strategies suitable for single-phase voltage source inverter. The proposed method is formulated using fundamental switching and carrier based pulse width modulation methods. The main tale of this proposed method is to optimize a specific performance criterion, such as minimization of the total harmonic distortion (THD), lower order harmonics, switching losses, and heat losses. The proposed method is articulated using fundamental switching and carrier based pulse width modulation methods. Thus, the harmonic pollution in the power system will be reduced and the power quality will be augmented with better harmonic profile for a target fundamental output voltage. The proposed modulation strategies are simulated in MATLAB r2010a and implemented in a Xilinx spartan 3E-500 FG 320 FPGA processor. The feasibility of these modulation strategies is authenticated through simulation and experimental results.

scholarly journals Sector Subdivision Based SVPWM Strategy of Neutral-Point-Clamped Three-Level Inverter for Current Ripple Reduction

Energies ◽  
2019 ◽  
Vol 12 (14) ◽  
pp. 2734 ◽  
Author(s):  
Guozheng Zhang ◽  
Bingxu Wei ◽  
Xin Gu ◽  
Xinmin Li ◽  
Zhanqing Zhou ◽  
...  
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Small Region ◽  
Output Current ◽  
Switching Sequence ◽  
Output Performance ◽  
Ripple Reduction ◽  
Average Current ◽  
Current Ripple ◽  
Continuous Pulse

This paper presents a sector subdivision based space vector pulse width modulation (SVPWM) strategy with reduced current ripple for a three-level inverter. Using the output current ripple theory, closed-form expressions of average current ripple vectors for both continuous and discontinuous switching sequences are derived. Based on the sector and triangle distributions of conventional SVPWM strategy, each triangle is further divided into three small-regions. Then the switching sequence with the lowest magnitude of the average current ripple vector is applied in every small-region, so that the advantages of continuous pulse width modulation (CPWM) and discontinuous pulse width modulation (DPWM) under different modulation index conditions are combined to reduce the current ripple in the whole modulation range. The output performance of the proposed strategy is compared with the conventional CPWM and DPWM strategy, and experimental results verify that the proposed strategy could reduce the current ripple of three-level inverters effectively.

Carrier-Based PWM Technique for Inverter-Fed Multiphase Induction Motor 

2016 ◽  
Vol 6 (5) ◽  
pp. 1967
Author(s):  
Jyothi B ◽  
M.Venugopala Rao
Keyword(s):  
Induction Motor ◽  
Pulse Width ◽  
Pulse Width Modulation ◽  
Voltage Source ◽  
Matlab Software ◽  
Third Harmonic ◽  
Voltage Source Inverters ◽  
Three Phase ◽  
Simulation Results ◽  
Multiphase Machine

<p>Multiphase (more than three phases) is very much popular due to their eminent features compared to conventional three-phase counter parts. In order to drive the multiphase machine, it requires same phase input w.r.t the no of phases at the output. This paper mainly focuses on five phase, because even after failure of one phase, the performance does not degraded much. Voltage source inverters (VSIs) are used to feed the induction motor. voltage source inverters (VSIs) switches are ON and OFF precisely to control the output. In order to implement harmonic waveform characteristic, carrier based PWM (pulse width modulation) is performed. By using with and without third harmonic injection machine torque is highly improved. Using MATLAB software, the simulation results are presented in the form of computer traces and high traded performance of the machine are discussed.</p>

scholarly journals Common-Mode Reduction SVPWM for Three-Phase Motor Fed by Two-Level Voltage Source Inverter

Energies ◽  
2020 ◽  
Vol 13 (15) ◽  
pp. 3884
Author(s):  
Jian Zheng ◽  
Mingcheng Lyu ◽  
Shengqing Li ◽  
Qiwu Luo ◽  
Keyuan Huang
Keyword(s):  
High Frequency ◽  
Pulse Width ◽  
Pulse Width Modulation ◽  
Voltage Source ◽  
Switching Frequency ◽  
Voltage Source Inverter ◽  
Large Magnitude ◽  
Common Mode ◽  
Common Mode Voltage ◽  
Three Phase

Aiming at the problem of large magnitude and high frequency of common-mode voltage (CMV) when space vector pulse width modulation (SVPWM) is used in a three-phase motor fed by a two-level voltage source inverter, a common-mode reduction SVPWM (CMRSVPWM) is studied. In this method, six new sectors are obtained by rotating six sectors of conventional SVPWM by 30°. In odd-numbered sectors, only three non-zero vectors with odd subscripts are used for synthesis, while in even-numbered sectors, only three non-zero vectors with even subscripts are used for synthesis. The actuation durations of three non-zero vectors in each switching period in each sector are given. Simulation and experimental results show that, compared with the conventional SVPWM, the CMV magnitude of CMRSVPWM is reduced by 66.67% and the CMV frequency of CMRSVPWM is reduced from the original switching frequency to the triple fundamental frequency. At the same time, the current, torque and speed of the motor are still good.

Sign in / Sign up

Export Citation Format

Share Document