scholarly journals A Novel Zero Dead-Time PWM Method to Improve the Current Distortion of a Three-Level NPC Inverter

Electronics ◽  
2020 ◽  
Vol 9 (12) ◽  
pp. 2195
Author(s):  
Jin-Wook Kang ◽  
Seung-Wook Hyun ◽  
Yong Kan ◽  
Hoon Lee ◽  
Jung-Hyo Lee
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Dead Time ◽  
Short Circuit ◽  
Reference Voltage ◽  
Voltage Source ◽  
Switching Operation ◽  
Voltage Unbalance ◽  
Offset Voltage ◽  
Simulation And Experiment

This paper proposes a novel pulse width modulation (PWM) for a three-level neutral point clamped (NPC) voltage source inverter (VSI). When the conventional PWM method is used in three-level NPC VSI, dead time is required to prevent a short circuit caused by the operation of complementary devices on the upper and lower arms. However, current distortion is increased because of the dead time and it can also cause a voltage unbalance in the dc-link. To solve this problem, we propose a zero dead-time width modulation (ZDPWM) which does not require dead time used in complementary operation. The proposed technique applies the offset voltage to the space vector pulse width modulation (SVPWM) reference voltage for the same modulation index (MI) as the conventional SVPWM, but any complementary switching operation needs dead time. In addition, the proposed method is divided into four operation sections using the reference voltage and phase current to operate switching devices which flow the current depending on the section. This ZDPWM method is simply implemented by carrier and reference voltage that reduce the current distortion, because complementary operation that needs dead time is not implemented. However, the operation section is delayed due to the sampling delay that occurs during the experiment. Therefore, in this paper, we conduct a modeling of sampling delay to improve the delay of operation section. To verify the principle and feasibility of the proposed ZDPWM method, a simulation and experiment are implemented.

scholarly journals New Dead-Time Compensation Method of Power Inverter using Carrier Based Sinusoidal Pulse-Width Modulation

2018 ◽  
Vol 8 (6) ◽  
pp. 4880
Author(s):  
Suroso Suroso ◽  
Daru Tri Nugroho ◽  
Toshihiko Noguchi
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Dead Time ◽  
Compensation Method ◽  
Voltage Source ◽  
Output Current ◽  
Dead Time Correction ◽  
Source Power ◽  
Dead Time Compensation ◽  
Sinusoidal Pulse Width Modulation

<p>A new dead-time compensation method of power inverter circuits is suggested and presented in this paper. The proposed method utilizes carrier based sinusoidal pulse width modulation technique to produce driving signals of the inverter power switches with dead-time correction capability. The proposed method able to eliminate dead-time effects such as reducing the waveform distortion of the inverter output current, and increasing the fundamental component amplitude of output current. An analysis of the proposed method is presented. Some computer simulations were carried out to investigate the principle operation, and to test performance of the new method. The developed method was validated through experimental test of H-bridge voltage source inverter circuits. The data obtained from the computer simulation and prototype experiments have confirmed that that the proposed method worked well compensating the dead-time in the voltage source power inverter circuits.</p>

scholarly journals Mitigating the dead-time effects on harmonics spectrum of inverter waveform by the confined band VSFPWM technique

2021 ◽  
Vol 12 (1) ◽  
pp. 295
Author(s):  
Hussain Attia ◽  
Hang Seng Che ◽  
Tan Kheng Suan Freddy ◽  
Ahmad Elkhateb
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Dead Time ◽  
Short Circuit ◽  
Harmonic Distortion ◽  
Switching Frequency ◽  
Positive Effects ◽  
The Dead ◽  
The Impact ◽  
Low Order

The dead-time is necessary to be inserted between the gates drive pulses of the two power electronic switches in a one leg of any inverter to avoid a short circuit in the leg and the DC supply as well. However, adding the dead-time increases the low order harmonics of the output voltage/current waveform of the inverter. This paper investigates the positive effects of decreasing the pulse width modulation (PWM) drive pulses number per fundamental period on the current low order harmonics. In addition, this paper evaluates the impact of the confined band variable switching frequency pulse width modulation (CB-VSFPWM) technique on inverter performance in terms of dead-time mitigating, and consequenctely lowering the low order harmonics. CB-VSFPWM technique reduces the total harmonic distortion (THD) levels in the inverter output current as well. Theoretical analysis of the CB-VSFPWM effectiveness in reducing the negative effect of the dead-time has explained in this study and confirmed by the MATLAB/Simulink simulation results.

scholarly journals A study on performances of carrier-based pulse-width modulation techniques for three-phase three-level t-type neutral-point-clamped inverter under switch-open-circuit fault on two neutral-point-connected legs

2020 ◽  
Vol 3 (3) ◽  
pp. first
Author(s):  
Nhờ Văn NGUYỄN ◽  
HONG-PHONG NGUYEN LE
Keyword(s):  
Pulse Width ◽  
Output Voltage ◽  
Pulse Width Modulation ◽  
Short Circuit ◽  
Harmonic Distortion ◽  
Open Circuit ◽  
Neutral Point ◽  
Voltage Source ◽  
Voltage Source Inverters ◽  
Critical Issues

Multilevel voltage source inverters (VSIs) have been used for several decades thanks to their advantages compared with traditional two level VSI. Among various types of multilevel configuration, the T-type neutral-point-clamped VSI (3L TNPC VSI or 333-type VSI) has gained the attention in recent years. Due to the unique structure, the 333-type VSI has critical issues in reliability in operation such as switch-open-circuit (SOC) and switch-short-circuit (SSC), which lead to several unrequired issues, for instance, reduction of system performance, distorted and unbalanced output voltages and currents, or triggering the protection circuits. In some applications, the amplitude reduction and harmonics distortion of output voltages in SOC faults are not acceptable. Therefore, it is necessary to develop a pulse-width modulation (PWM) algorithm for 333-type VSI working under SOC fault which guarantees the desired output fundamental component voltage. The simultaneous SOC fault on two neutral-point-connected legs in the 333-type VSI may cause a large reduction in the output voltage. Under this circumstance, the 333-type VSI becomes an asymmetrical one called 322-type VSI. Certain studies regarding to the operation of 333-type VSI under SOC faults have been carried out. However, these studies require more semiconductor devices in order to create a redundant switching circuit. This leads to higher system cost with reduced inverter effieciency due to the additional loss. In this study, two carrier-based pulse-width modulation (CBPWM) techniques, i.e. 322-sinusoidal PWM (322-SPWM) and 322-medium offset CBPWM (322-MOCBPWM) are proposed for 322-type VSI. The proposed techniques are firstly simulated in MATLAB/Simulink and then implemented on a hardware setup. Performances of the proposed techniques are evaluated in terms of total harmonic distortion (THD) and weighted-THD (WTHD) of output voltages. Simulation results show that considering the worst output voltage under SOC fault, vBC, the proposed 322-SPWM technique could improve the THD by 40% and the WTHD by 94% compared with the uncompensated case with m=0.8. The corresponding results of 322-MOCBPWM technique are 42% and 96%, respectively. Characteristics of THD and WTHD values are also presented for demonstration the effectiveness of the proposed algorithm.

Optimized Non-Dead-Time Control of Inverter with Two-Phase Modulated SVPWM

2012 ◽  
Vol 562-564 ◽  
pp. 1531-1536
Author(s):  
Ming Xing Zhu ◽  
Jing Bo Shi
Keyword(s):  
Control Strategy ◽  
Pulse Width Modulation ◽  
Dead Time ◽  
Control Method ◽  
Short Circuit ◽  
Two Phase ◽  
Zero Crossing ◽  
Time Control ◽  
Bus Voltage ◽  
Current Zero

In the inverter control system, two-phase modulated space vector pulse width modulation (SVPWM) algorithm has the advantages of minimum switch loss and higher utilization of direct current (DC) bus voltage. Non-dead-time control strategy can eliminate the problems of the dead time effects. But the traditional non-dead-time control strategy heavily depends on the current zero-crossing detection, which may cause the output voltage distortion or even a short circuit. Based on the analysis of the reason for the distortion, a new optimized non-dead-time control method is proposed. Two methods for the detection of the overlapping area are enumerated. The conclusions are confirmed by the simulation results with MATLAB/ SIMULINK.

Adaptive Control of Pulse Width Modulation Voltage-Source Rectifier with Disturbance Signals

2013 ◽  
Vol 385-386 ◽  
pp. 977-980
Author(s):  
Bao Bin Liu
Keyword(s):  
Pulse Width ◽  
Pulse Width Modulation ◽  
Controller Design ◽  
Adaptive Controller ◽  
Voltage Source ◽  
Robust Controller ◽  
Reference Velocity ◽  
Velocity Tracking ◽  
Modulation Voltage ◽  
Robust Controller Design

A nonlinear adaptive controller is proposed for the design of pulse width modulation voltage-source rectifier with disturbance signals of harmonics to achieve reference velocity tracking. The procedure of the robust controller design is developed via improved backstepping method. With the proposed controller, PWM voltage-source rectifiers can guarantee accuracy of output voltage tracking. Global asymptotic stability of the closed-loop system has been proved. The simulation results demonstrate effectiveness of the presented method.

scholarly journals Adaptive Fuzzy PI Current Control of Grid Interact PV Inverter

2018 ◽  
Vol 8 (1) ◽  
pp. 472 ◽  
Author(s):  
R.S. Ravi Sankar ◽  
S.V. Jayaram Kumar ◽  
G. Mohan Rao
Keyword(s):  
Power Generation ◽  
Pulse Width Modulation ◽  
Fuzzy Controller ◽  
Pi Controller ◽  
Current Control ◽  
Reference Voltage ◽  
Voltage Source ◽  
Pv Inverter ◽  
Photo Voltaic ◽  
Pv Power Generation

Now a day‟s, Photo Voltaic (PV) power generation rapidly increasing. This power generation highly depending on the temperature and irradiation. When this power interface with grid through the voltage source inverter with PI controller. Its gains should be updated due to the parametric changes for the better performance. In This Work Fuzzy Controller updates the gains of the proportional integral (PI)s Controller under variable parametric conditions. the gaines of the PI Controller are updated based on the error current and change in error current through the fuzzy controller. The error current in direct and quadrature frame are the Inputs to the PI controller. The PI Controller generates the reference voltage to the pulse width modulation technique. Here reference voltage is compared with the carrier signal to generate the pulses to the 3-Ph Inverter connected to the grid. This controller has given well dynamic response with less steady state error and also given The less THD of the grid current compared to the PI and Fuzzy controller.It Is implemented and verified in MATLAB Simulink.

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