Reduced decoding time of LDPC code using convolutional code with Vitrebi decoding in Underwater Communication

2018 ◽  
Vol 7 (2.25) ◽  
pp. 167
Author(s):  
Krishnamoorthy N.R ◽  
Ramadevi R ◽  
Marshiana M ◽  
Sujatha Kumaran

Low Density Parity Check code is the more efficient technique to attain the minimal error rate in the underwater channel. To reduce the processing delay in the LDPC decoding, convolutional code with high code rate is used. The result showed that the BER of 10-4 can be obtained with Eb/No value of 20 for code rate of ½ and 12 for code rate of 1/8. It is also showed in result that the decoding time is reduced one-third for data size of 500 and one-tenth for the data size of 1500 bits.  

Electronics ◽  
2019 ◽  
Vol 8 (12) ◽  
pp. 1515
Author(s):  
Francesca Vatta ◽  
Fulvio Babich ◽  
Flavio Ellero ◽  
Matteo Noschese ◽  
Giulia Buttazzoni ◽  
...  

The objective of this work is to analyze the importance of the product λ ′ ( 0 ) ρ ′ ( 1 ) in determining low density parity check (LDPC) code performance, as far as its influence on the weight distribution function and on the decoding thresholds. This analysis is based on the 2006 paper by Di et al., as far as the weight distribution function is concerned, and on the 2018 paper by Vatta et al., regarding the LDPC decoding thresholds. In particular, the first paper Di et al. analyzed the relation between the above mentioned product and the minimum weight of an ensemble of random LDPC codewords, whereas in the second some analytical upper bounds to the LDPC decoding thresholds were determined. In the present work, besides analyzing the performance of an ensemble of LDPC codes through the outcomes of Di et al.’s 2006 paper, we give the relation between one of the upper bounds found in Vatta et al.’s 2018 paper and the above mentioned product λ ′ ( 0 ) ρ ′ ( 1 ) , thus showing its role in also determining an upper bound to LDPC decoding thresholds.


2014 ◽  
Vol 511-512 ◽  
pp. 375-380
Author(s):  
Ji Gang Dong ◽  
Da Jun Sun ◽  
You Wen Zhang ◽  
Wei Wei Fan

In this paper, a frequency-hopping frequency-shift keying (FH-FSK) underwater acoustic control and communication system based on Low Density Parity Check Codes (LDPC) is proposed by combining with FH-FSK system and LDPC. The anti-jamming performance of the system in the condition of Gaussian white noise and coherent multi-path channel is simulated respectively. The simulation result shows that FH-FSK system based on LDPC has a better performance than that of convolutional code. Therefore, it is more applicable for the system to have a stable anti-jamming performance and better robustness.


2018 ◽  
Vol 179 ◽  
pp. 03023
Author(s):  
Jin Wang ◽  
Fujiang Zeng ◽  
Qingqing Liang ◽  
Xiaofeng Zhang

We investigate the performance of low-density parity-check (LDPC) coding for free space optical communication (FSO) with modified Bessel-Gaussian (MBG) beams based on K-distribution. Based on an extended Huygens–Fresnel principle, the receiver plane intensity isformulated and then we analyze the propagation characteristics of MBG beams traveling in aturbulent atmosphere. Numerical calculations show that the interaction of the transmissiondistance, refractive index structure constant, and wavelength will affect the imaginary term inthe beam, allowing the beam to exhibit the properties of the MBG beams. To further improvethe communication quality of the FSO system, we introduce a fast Quasi-Cyclic (QC)Low-Density Parity-Check (LDPC) code. Simulation results show that under weak and strong turbulence conditions, the performance of the QC-LDPC code becomes better and better as the code rate increases, and the bit error rate (BER) keeps decreasing as the code rate increases.


Author(s):  
Mouhcine Razi ◽  
Mhammed Benhayoun ◽  
Anass Mansouri ◽  
Ali Ahaitouf

<span lang="EN-US">For low density parity check (LDPC) decoding, hard-decision algorithms are sometimes more suitable than the soft-decision ones. Particularly in the high throughput and high speed applications. However, there exists a considerable gap in performances between these two classes of algorithms in favor of soft-decision algorithms.  In order to reduce this gap, in this work we introduce two new improved versions of the hard-decision algorithms, the adaptative gradient descent bit-flipping (AGDBF) and adaptative reliability ratio weighted GDBF (ARRWGDBF).  An adaptative weighting and correction factor is introduced in each case to improve the performances of the two algorithms allowing an important gain of bit error rate. As a second contribution of this work a real time implementation of the proposed solutions on a digital signal processors (DSP) is performed in order to optimize and improve the performance of these new approchs. The results of numerical simulations and DSP implementation reveal a faster convergence with a low processing time and a reduction in consumed memory resources when compared to soft-decision algorithms. For the irregular LDPC code, our approachs achieves gains of 0.25 and 0.15 dB respectively for the AGDBF and ARRWGDBF algorithms.</span>


2009 ◽  
Vol 7 ◽  
pp. 213-218
Author(s):  
C. Beuschel ◽  
H.-J. Pfleiderer

Abstract. Im vorliegenden Beitrag wird eine universelle Decoderarchitektur für einen Low-Density Parity-Check (LDPC) Code Decoder vorgestellt. Anders als bei den in der Literatur häufig beschriebenen Architekturen für strukturierte Codes ist die hier vorgestellte Architektur frei programmierbar, so dass jeder beliebige LDPC Code durch eine Änderung der Initialisierung des Speichers für die Prüfmatrix mit derselben Hardware decodiert werden kann. Die größte Herausforderung beim Entwurf von teilparallelen LDPC Decoder Architekturen liegt im konfliktfreien Datenaustausch zwischen mehreren parallelen Speichern und Berechnungseinheiten, wozu ein Mapping und Scheduling Algorithmus benötigt wird. Der hier vorgestellte Algorithmus stützt sich auf Graphentheorie und findet für jeden beliebigen LDPC Code eine für die Architektur optimale Lösung. Damit sind keine Wartezyklen notwendig und die Parallelität der Architektur wird zu jedem Zeitpunkt voll ausgenutzt.


2013 ◽  
Vol 347-350 ◽  
pp. 1864-1867
Author(s):  
Ning Hao ◽  
Yang An Zhang ◽  
Jin Nan Zhang ◽  
Ming Lun Zhang ◽  
Xue Guang Yuan

Low Density Parity Check code is more and more taken seriously in high-speed transmission. In this article we represent a LDPC coder and decoder which based on IEEE802.16e and realize the coder and decoder with Virtex-5 FPGA. By using Matlab to make an off-line system simulation, we analyzed and compared the LDPC performance under the different length of code for LDPC coder then analyzed the influence of different iteration to the LDPC BER performance of decoder.


2018 ◽  
Vol 7 (03) ◽  
pp. 23781-23784
Author(s):  
Rajarshini Mishra

Low-density parity-check (LDPC) have been shown to have good error correcting performance approaching Shannon’s limit. Good error correcting performance enables efficient and reliable communication. However, a LDPC code decoding algorithm needs to be executed efficiently to meet cost , time, power and bandwidth requirements of target applications. Quasi-cyclic low-density parity-check (QC-LDPC) codes are an important subclass of LDPC codes that are known as one of the most effective error controlling methods. Quasi cyclic codes are known to possess some degree of regularity. Many important communication standards such as DVB-S2 and 802.16e use these codes. The proposed Optimized Min-Sum decoding algorithm performs very close to the Sum-Product decoding while preserving the main features of the Min-Sum decoding, that is low complexity and independence with respect to noise variance estimation errors.Proposed decoder is well matched for VLSI implementation and will be implemented on Xilinx FPGA family


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