Profiling Different Kinds of Generated Defects at Elevated Temperature in Both SiO2 and High-k Dielectrics

2010 ◽  
Vol 1252 ◽  
Author(s):  
Sahar Sahhaf ◽  
Robin Degraeve ◽  
Mohammed Zahid ◽  
Guido Groeseneken

AbstractIn this work, the effect of elevated temperature on the generated defects with constant voltage stress (CVS) in SiO2 and SiO2/HfSiO stacks is investigated. Applying Trap Spectroscopy by Charge Injection and Sensing (TSCIS) to 6.5 nm SiO2 layers, different kinds of generated traps are profiled at low and high temperature. Also the Stress-Induced Leakage Current (SILC) spectrum of high-k dielectric stack is different at elevated temperature indicating that degradation and breakdown at high temperature is not equivalent to that at low temperature and therefore, extrapolation of data from high to low T or vice versa is challenging.

2009 ◽  
Vol 9 (2) ◽  
pp. 203-208 ◽  
Author(s):  
M.S. Rahman ◽  
T.H. Morshed ◽  
Z. Celik-Butler ◽  
M.A. Quevedo-Lopez ◽  
A. Shanware ◽  
...  

2014 ◽  
Vol 33 (3) ◽  
pp. 193-200 ◽  
Author(s):  
Jiteng Wang ◽  
Juan Wang ◽  
Yajiang Li ◽  
Deshuang Zheng

AbstractMolybdenum and molybdenum alloys are considered to be attractive structural materials for high-temperature applications. However, molybdenum alloys are sensitive to gas impurities and have the characteristics of low temperature embrittlement and less resistance to oxidation at elevated temperature. The toughness and strength of welded joint is not easy to be ensured by traditional technology. Recently, many efforts have been made to join molybdenum and its alloys. In this paper, we present the result of investigations on welding methods of molybdenum and its alloys and overview the practical applications in engineering. The key of joining molybdenum alloys is to improve the toughness of welded joint and prevent the generation of pores and cracks.


2014 ◽  
Vol 14 (5) ◽  
pp. 543-548 ◽  
Author(s):  
Ho-Young Kwak ◽  
Sung-Kyu Kwon ◽  
Hyuk-Min Kwon ◽  
Seung-Yong Sung ◽  
Su Lim ◽  
...  

2007 ◽  
Vol 134 ◽  
pp. 379-382
Author(s):  
Claire Therese Richard ◽  
D. Benoit ◽  
S. Cremer ◽  
L. Dubost ◽  
B. Iteprat ◽  
...  

3D architecture is an alternative way to high-k dielectric to increase the capacitance of MIM structure. However, the top of this kind of structure is very sensitive to defectivity and then requires a special wet treatment. In this paper, we present the process flow for a 3D MIM integration in a CMOS copper back-end and a two steps wet process which provides very good electrical performances, i.e. leakage current lower than 10-9A.cm-2 at 5V / 125°C and breakdown voltage higher than 20V. At first, a SC1 step is done for electrode isolation improvement by material etching with good selectivity towards dielectric: that’s the electrode recess. In the second time, a HF step is done for copper oxide dilution and residues removal from the top of the 3D structure.


2020 ◽  
Vol 5 (3) ◽  
pp. 035003
Author(s):  
Ibrahim H Khawaji ◽  
Alyssa N Brigeman ◽  
Osama O Awadelkarim ◽  
Akhlesh Lakhtakia

2019 ◽  
Vol 10 ◽  
pp. 1125-1130 ◽  
Author(s):  
Dapeng Wang ◽  
Mamoru Furuta

This study examines the effect of the annealing temperature on the initial electrical characteristics and photo-induced instabilities of amorphous indium gallium zinc oxide (a-IGZO) thin-film transistors (TFTs). The extracted electrical parameters from transfer curves suggest that a low-temperature treatment maintains a high density of defects in the IGZO bulk, whereas high-temperature annealing causes a quality degradation of the adjacent interfaces. Light of short wavelengths below 460 nm induces defect generation in the forward measurement and the leakage current increases in the reverse measurement, especially for the low-temperature-annealed device. The hysteresis after negative-bias-illumination-stress (NBIS) is quantitatively investigated by using the double-scan mode and a positive gate pulse. Despite the abnormal transfer properties in the low-temperature-treated device, the excited holes are identically trapped at the front interface irrespective of treatment temperature. NBIS-induced critical instability occurs in the high-temperature-annealed TFT.


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