Reliability Study of Plasma Etching Damage in ULSI Process

1994 ◽  
Vol 338 ◽  
Author(s):  
Xiao-Yu Li ◽  
Jen-Tai Hsu ◽  
Paul Aum ◽  
Vivek Bissessur ◽  
David Chan ◽  
...  
Keyword(s):  
Plasma Etching ◽  
High Field ◽  
Gate Oxide ◽  
Cmos Technology ◽  
Plasma Process ◽  
Reliability Study ◽  
Hot Carrier ◽  
Mos Devices ◽  
Induced Stress ◽  
Process Damage

ABSTRACTPlasma etching can cause damage in gate oxide during ULSI processing. The damage in the oxide is believed to arise through a high field induced stress current. However, there is another type of damage which is due to ion and photon bombardment on the edge of poly-Si gate during the plasma etching. These two damage mechanisms impose different reliability problems. One is hot-carrier(HC) stress and the other is Fowler-Nordheim(F-N) stress. MOS devices with special test structures to assess plasma process damage were fabricated using 0.35 μm CMOS technology. The devices with different poly gate antennas and etching through different poly-Si gate etching conditions were studied using SEM and various electrical techniques. It was found that oxide charging damaged device is more susceptible to F-N type of stress while ion and photon bombardment damaged device is more susceptible to HC type of stress.

Gate Oxide Long-Term Reliability of 4H-SiC MOS Devices

2010 ◽  
Vol 645-648 ◽  
pp. 805-808 ◽  
Author(s):  
Liang Chun Yu ◽  
Kin P. Cheung ◽  
Greg Dunne ◽  
Kevin Matocha ◽  
John S. Suehle ◽  
...  
Keyword(s):  
High Field ◽  
Field Data ◽  
Gate Oxide ◽  
Early Prediction ◽  
Accelerated Test ◽  
Mos Capacitors ◽  
Mos Devices ◽  
Test Conditions ◽  
Oxide Reliability

Reliability of the gate oxide on SiC is a pressing concern for deploying SiC MOS-based devices in real systems. While good projected oxide reliability was obtained recently under highly accelerated test conditions, indication that such projection may not be valid at lower operating fields was also reported. In this work, results from long-term TDDB stress (over 7 months) at 6 MV/cm and 300 °C on 4H-SiC MOS capacitors is reported. We confirm that lifetime projection from high-field data continues to be valid and no change in field acceleration factor is observed. The discrepancy between our results and the early prediction of poor reliability is examined.

scholarly journals The TDDB Characteristics of Ultra-Thin Gate Oxide MOS Capacitors under Constant Voltage Stress and Substrate Hot-Carrier Injection

2018 ◽  
Vol 2018 ◽  
pp. 1-6
Author(s):  
Jingyu Shen ◽  
Can Tan ◽  
Rui Jiang ◽  
Wei Li ◽  
Xue Fan ◽  
...  
Keyword(s):  
Degradation Mechanism ◽  
Gate Oxide ◽  
Cmos Technology ◽  
Carrier Injection ◽  
Constant Voltage ◽  
Mos Capacitors ◽  
Hot Carrier ◽  
Hot Carrier Injection ◽  
Voltage Stress ◽  
Thin Gate Oxide

The breakdown characteristics of ultra-thin gate oxide MOS capacitors fabricated in 65 nm CMOS technology under constant voltage stress and substrate hot-carrier injection are investigated. Compared to normal thick gate oxide, the degradation mechanism of time-dependent dielectric breakdown (TDDB) of ultra-thin gate oxide is found to be different. It is found that the gate current (Ig) of ultra-thin gate oxide MOS capacitor is more likely to be induced not only by Fowler-Nordheim (F-N) tunneling electrons, but also by electrons surmounting barrier and penetrating electrons in the condition of constant voltage stress. Moreover it is shown that the time to breakdown (tbd) under substrate hot-carrier injection is far less than that under constant voltage stress when the failure criterion is defined as a hard breakdown according to the experimental results. The TDDB mechanism of ultra-thin gate oxide will be detailed. The differences in TDDB characteristics of MOS capacitors induced by constant voltage stress and substrate hot-carrier injection will be also discussed.

Reduced Hot-Carrier Induced Degradation of NMOS I/O Transistors with Sub-micron Source-Drain Diffusion Length for 0.11 µm Dual Gate Oxide CMOS Technology

2005 ◽  
Vol 44 (4B) ◽  
pp. 2125-2131
Author(s):  
Kwang-Seng See ◽  
Wai-Shing Lau ◽  
Suey-Li Toh ◽  
Hong Liao ◽  
Jae Gon Lee ◽  
...  
Keyword(s):  
Diffusion Length ◽  
Gate Oxide ◽  
Cmos Technology ◽  
Hot Carrier ◽  
Dual Gate

Reduced Hot-Carrier Induced Degradation of NMOS I/O Transistors with Sub-micron Source-Drain Diffusion Length for 0.11 μm Dual Gate Oxide CMOS Technology

2004 ◽  
Author(s):  
Kwang-Seng See ◽  
Wai-Shing Lau ◽  
Hong Liao ◽  
Jae Gon Lee ◽  
Elgin Kiok-Boone Quek ◽  
...  
Keyword(s):  
Diffusion Length ◽  
Gate Oxide ◽  
Cmos Technology ◽  
Hot Carrier ◽  
Dual Gate
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