Temperature Measurement of Metallized Silicon Wafers by Infrared Transmission Using Single- and Double-Pass Geometries

1994 ◽  
Vol 342 ◽  
Author(s):  
C.W. Cullen ◽  
J.C. Sturm
Keyword(s):  
Temperature Measurement ◽  
Silicon Wafer ◽  
Silicon Wafers ◽  
Infrared Transmission ◽  
Double Pass ◽  
Wafer Temperature ◽  
Single Pass ◽  
Transmission Technique

ABSTRACTThe infrared transmission technique for the measurement of silicon wafer temperature has been extended to metallized wafers. For wafers with partial metal coverage, a single-pass method has been demonstrated from 200°C to 550°C. For wafers with blanket metal coverage, a novel double-pass infrared transmission technique is presented.

New Reliable Structure for High Temperature Measurement of Silicon Wafers Using a Specially Attached Thermocouple

1983 ◽  
Vol 23 ◽  
Author(s):  
S.A. Cohen ◽  
T.O. Sedgwick ◽  
J.L. Speidell
Keyword(s):  
Material Processing ◽  
High Temperature ◽  
Temperature Measurement ◽  
Silicon Wafer ◽  
Silicon Wafers ◽  
Temperature Measurements ◽  
Wafer Temperature ◽  
High Temperature Measurement ◽  
Short Time ◽  
Repeated Cycling

ABSTRACTAccurate wafer temperature measurement is very important in the area of material processing. In Short Time Annealing, for example, it is necessary to monitor temperature peaks of up to 1200°C which are only a few seconds in duration. This paper describes a structure consisting of a silicon wafer with a specially attached thermocouple. This structure is capable of reliable high temperature measurements of up to 1200°C and is also capable of surviving repeated cycling at that temperature.

scholarly journals Simulation of silicon wafers heating during rapid thermal processing using “UBTO 1801” unit

Doklady BGUIR ◽  
2020 ◽  
Vol 18 (7) ◽  
pp. 79-86
Author(s):  
J. A. Solovjov ◽  
V. A. Pilipenko ◽  
V. P. Yakovlev
Keyword(s):  
Mathematical Model ◽  
Silicon Wafer ◽  
Thermal Processing ◽  
Rapid Thermal Processing ◽  
Light Flux ◽  
Silicon Wafers ◽  
Wafer Surface ◽  
Constant Density ◽  
Wafer Temperature

The present work is devoted to determination of the dependence of the heating temperature of the silicon wafer on the lamps power and the heating time during rapid thermal processing using “UBTO 1801” unit by irradiating the wafer backside with an incoherent flow of constant density light. As a result, a mathematical model of silicon wafer temperature variation was developed on the basis of the equation of nonstationary thermal conductivity and known temperature dependencies of the thermophysical properties of silicon and the emissivity of aluminum and silver applied to the planar surface of the silicon wafer. For experimental determination of the numerical parameters of the mathematical model, silicon wafers were heated with light single pulse of constant power to the temperature of one of three phase transitions such as aluminum-silicon eutectic formation, aluminum melting and silver melting. The time of phase transition formation on the wafer surface during rapid thermal processing was fixed by pyrometric method. In accordance with the developed mathematical model, we determined the conversion coefficient of the lamps electric power to the light flux power density with the numerical value of 5.16∙10-3 cm-2 . Increasing the lamps power from 690 to 2740 W leads to an increase in the silicon wafer temperature during rapid thermal processing from 550°to 930°K, respectively. With that, the wafer temperature prediction error in compliance with developed mathematical model makes less than 2.3 %. The work results can be used when developing new procedures of rapid thermal processing for silicon wafers.

Wavelength Considerations for Improved Silicon Wafer Temperature Measurement by Ellipsometry

1994 ◽  
Vol 141 (2) ◽  
pp. 539-542 ◽  
Author(s):  
R. K. Sampson ◽  
K. A. Conrad ◽  
H. Z. Massoud ◽  
E. A. Irene
Keyword(s):  
Temperature Measurement ◽  
Silicon Wafer ◽  
Wafer Temperature

Optimization of the Ast Hot Liner™ for Sub-Micron Production

1997 ◽  
Vol 470 ◽  
Author(s):  
Terrence J. Riley ◽  
Rolf Bremensdorfer ◽  
Steve Marcus
Keyword(s):  
Steady State ◽  
Silicon Nitride ◽  
Temperature Measurement ◽  
Silicon Wafer ◽  
Measurement Technique ◽  
Optimization Process ◽  
Temperature Uniformity ◽  
Wafer Temperature ◽  
Process Uniformity ◽  
Temperature Measurement Technique

ABSTRACTIn an effort to develop an emissivity independent temperature measurement technique for the AST Rapid Thermal Processor (RTP), AST has conceived of the Hot Liner™. The Hot Liner is a silicon nitride coated silicon wafer which is permanently installed in the process chamber, immediately below the wafer. The pyrometer, which is calibrated to a production wafer, views the constant emissivity Hot Liner to produce repeatable temperatures on product wafers regardless of their backside emissivity.Given the repeatability of the Hot Liner, the wafer temperature uniformity must then be optimized in order to achieve 0.25μm capable processing. AST has developed a methodology which incorporates process monitors (ion implanted test wafers) to establish process uniformity in addition to multiple thermocouple wafers to verify across wafer temperature uniformity. The process monitors are used to separately optimize the ramp and steady state steps in the production recipe.Utilizing the AST methodology to optimize processing with the Hot Liner has allowed AMD to significantly improve its RTA processing. The Hot Liner greatly decreases backside and pyrometer effects which yields limited wafer to wafer variation (< 5C, 3σ). In combination with the optimization process this results in excellent within wafer uniformity (< 3C, 3σ).

Study of Stresses in Thin Silicon Wafers with Near-infraredphase Stepping Photoelasticity

2002 ◽  
Vol 17 (1) ◽  
pp. 36-42 ◽  
Author(s):  
Tieyu Zheng ◽  
Steven Danyluk
Keyword(s):  
Near Infrared ◽  
Silicon Wafers ◽  
Infrared Transmission ◽  
Orientation Measurement ◽  
Phase Stepping ◽  
Stress Orientation ◽  
Transmission Technique ◽  
Stress Coefficient ◽  
Thin Silicon

This paper reports on a study of stress in thin silicon plates sectioned from wafers by a near-infrared transmission technique. Phase stepping was incorporated to determine the magnitude and orientation of stress from fractional birefringence fringe images. The anisotropic relative optic-stress coefficient of (100) silicon was determined and the limitation of the stress orientation measurement is discussed.

Wavelength dependence for silicon-wafer temperature measurement by autocorrelation-type frequency-domain low-coherence interferometry

2015 ◽  
Vol 54 (23) ◽  
pp. 7088
Author(s):  
Takayoshi Tsutsumi ◽  
Takayuki Ohta ◽  
Keigo Takeda ◽  
Masafumi Ito ◽  
Masaru Hori
Keyword(s):  
Temperature Measurement ◽  
Frequency Domain ◽  
Silicon Wafer ◽  
Wavelength Dependence ◽  
Wafer Temperature ◽  
Low Coherence ◽  
Low Coherence Interferometry ◽  
Type Frequency

scholarly journals The Influence of Wire Speed on Phase Transitions and Residual Stress in Single Crystal Silicon Wafers Sawn by Resin Bonded Diamond Wire Saw

Micromachines ◽  
2021 ◽  
Vol 12 (4) ◽  
pp. 429
Author(s):  
Tengyun Liu ◽  
Peiqi Ge ◽  
Wenbo Bi
Keyword(s):  
Residual Stress ◽  
Surface Layer ◽  
Phase Transitions ◽  
Single Crystal ◽  
Amorphous Silicon ◽  
Silicon Wafer ◽  
Single Crystal Silicon ◽  
Silicon Wafers ◽  
Crystal Silicon ◽  
Diamond Wire

Lower warp is required for the single crystal silicon wafers sawn by a fixed diamond wire saw with the thinness of a silicon wafer. The residual stress in the surface layer of the silicon wafer is the primary reason for warp, which is generated by the phase transitions, elastic-plastic deformation, and non-uniform distribution of thermal energy during wire sawing. In this paper, an experiment of multi-wire sawing single crystal silicon is carried out, and the Raman spectra technique is used to detect the phase transitions and residual stress in the surface layer of the silicon wafers. Three different wire speeds are used to study the effect of wire speed on phase transition and residual stress of the silicon wafers. The experimental results indicate that amorphous silicon is generated during resin bonded diamond wire sawing, of which the Raman peaks are at 178.9 cm−1 and 468.5 cm−1. The ratio of the amorphous silicon surface area and the surface area of a single crystal silicon, and the depth of amorphous silicon layer increases with the increasing of wire speed. This indicates that more amorphous silicon is generated. There is both compressive stress and tensile stress on the surface layer of the silicon wafer. The residual tensile stress is between 0 and 200 MPa, and the compressive stress is between 0 and 300 MPa for the experimental results of this paper. Moreover, the residual stress increases with the increase of wire speed, indicating more amorphous silicon generated as well.

Experimental investigation into polishing of monocrystalline silicon wafer using double-disc chemical assisted magnetorheological finishing process

2021 ◽  
pp. 095440622098384
Author(s):  
Mayank Srivastava ◽  
Pulak M Pandey
Keyword(s):  
Surface Roughness ◽  
Silicon Wafer ◽  
Flow Rate ◽  
Silicon Wafers ◽  
Monocrystalline Silicon ◽  
Slurry Flow ◽  
Magnetorheological Finishing ◽  
Finishing Process ◽  
Process Factors ◽  
Slurry Flow Rate

In the present work, a novel hybrid finishing process that combines the two preferred methods in industries, namely, chemical-mechanical polishing (CMP) and magneto-rheological finishing (MRF), has been used to polish monocrystalline silicon wafers. The experiments were carried out on an indigenously developed double-disc chemical assisted magnetorheological finishing (DDCAMRF) experimental setup. The central composite design (CCD) was used to plan the experiments in order to estimate the effect of various process factors, namely polishing speed, slurry flow rate, percentage CIP concentration, and working gap on the surface roughness ([Formula: see text]) by DDCAMRF process. The analysis of variance was carried out to determine and analyze the contribution of significant factors affecting the surface roughness of polished silicon wafer. The statistical investigation revealed that percentage CIP concentration with a contribution of 30.6% has the maximum influence on the process performance followed by working gap (21.4%), slurry flow rate (14.4%), and polishing speed (1.65%). The surface roughness of polished silicon wafers was measured by the 3 D optical profilometer. Scanning electron microscopy (SEM) and atomic force microscopy (AFM) were carried out to understand the surface morphology of polished silicon wafer. It was found that the surface roughness of silicon wafer improved with the increase in polishing speed and slurry flow rate, whereas it was deteriorated with the increase in percentage CIP concentration and working gap.

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