Deep Diffusions and Soi Layers Produced by Rapid Thermal Processing for Smart Power Applications

1997 ◽  
Vol 470 ◽  
Author(s):  
J-M. Dilhac ◽  
L. Cornibert ◽  
C. Ganibal

ABSTRACTPower devices often contain very deep boron diffusions extending through the thickness of the wafer to create junction isolation. In this paper we first report our investigations to replace the standard solid-state deep diffusion, with Temperature-Gradient Zone Melting (TGZM). During TGZM, a molten silicon/aluminium solution moves through a Si wafer in minutes, leaving a highly Al doped trail behind it. The liquid phase diffusion is driven by the vertical thermal gradient created in the wafer by a properly designed RTP.On the other hand, for the purpose of high voltage (> 400V) smart power applications, substrates with localised and thick SOI layers are needed. We also present a method for recrystallization of thick poly silicon films by Lateral Epitaxial Growth over Oxide (LEGO), using a similarly designed RTP.The two processes, that is LEGO and TGZM, use a Rapid Thermal Processor and are compatible. The RTP is specially designed to create a thermal gradient perpendicular to the wafer surface.

1995 ◽  
Vol 387 ◽  
Author(s):  
Peter Y. Wong ◽  
Ioannis N. Miaoulis ◽  
Cynthia G. Madras

AbstractTemperature measurements and processing uniformity continue to be major issues in Rapid Thermal Processing. Spatial and temporal variations in thermal radiative properties of the wafer surface are sources of non-uniformities and dynamic variations. These effects are due to changes in spectral distribution (wafer or heat source), oxidation, epitaxy, silicidation, and other microstructural transformations. Additionally, other variations are induced by the underlying (before processing) and developing (during processing) patterns on the wafer. Numerical simulations of Co silicidation that account for these factors are conducted to determine the radiative properties, heat transfer dynamics, and resultant processing uniformity.


1991 ◽  
Vol 224 ◽  
Author(s):  
C. Schietinger ◽  
B. Adams ◽  
C. Yarling

AbstractA novel wafer temperature and emissivity measurement technique for rapid thermal processing (RTP) is presented. The ‘Ripple Technique’ takes advantage of heating lamp AC ripple as the signature of the reflected component of the radiation from the wafer surface. This application of Optical Fiber Thermometry (OFT) allows high speed measurement of wafer surface temperatures and emissivities. This ‘Ripple Technique’ is discussed in theoretical and practical terms with wafer data presented. Results of both temperature and emissivity measurements are presented for RTP conditions with bare silicon wafers and filmed wafers.


1987 ◽  
Vol 92 ◽  
Author(s):  
Jim D. Whitfield ◽  
Marie E. Burnham ◽  
Charles J. Varker ◽  
Syd.R. Wilson

The advantages of Silicon-on-Insulator (SO) devices over bulk Silicon devices are well known (speed, radiation hardened, packing density, latch up free CMOS,). In recent years, much effort has been made to form a thin, buried insulating layer just below the active device region. Several approaches are being developed to fabricate such a buried insulating layer. One viable approach is by high dose, high energy oxygen implantation directly into the silicon wafer surface (1-3). With proper implant and annealing conditions, a thin stoichiometric buried oxide with a good crystalline quality silicon overlayer can be formed on which an epitaxial layer can be grown and functional devices and circuits built. As SO1 circuits become market viable, mass production tools and techniques are being developed and evaluated. Of particular interest here is the evaluation of high current oxygen implantation with rapid thermal processing on the electrical characteristics of the oxide-silicon interfaces, the silicon overlayer and the thermally grown oxide on the top surface using measurements on gated diodes and guarded capacitors.


Doklady BGUIR ◽  
2020 ◽  
Vol 18 (7) ◽  
pp. 79-86
Author(s):  
J. A. Solovjov ◽  
V. A. Pilipenko ◽  
V. P. Yakovlev

The present work is devoted to determination of the dependence of the heating temperature of the silicon wafer on the lamps power and the heating time during rapid thermal processing using “UBTO 1801” unit by irradiating the wafer backside with an incoherent flow of constant density light. As a result, a mathematical model of silicon wafer temperature variation was developed on the basis of the equation of nonstationary thermal conductivity and known temperature dependencies of the thermophysical properties of silicon and the emissivity of aluminum and silver applied to the planar surface of the silicon wafer. For experimental determination of the numerical parameters of the mathematical model, silicon wafers were heated with light single pulse of constant power to the temperature of one of three phase transitions such as aluminum-silicon eutectic formation, aluminum melting and silver melting. The time of phase transition formation on the wafer surface during rapid thermal processing was fixed by pyrometric method. In accordance with the developed mathematical model, we determined the conversion coefficient of the lamps electric power to the light flux power density with the numerical value of 5.16∙10-3 cm-2 . Increasing the lamps power from 690 to 2740 W leads to an increase in the silicon wafer temperature during rapid thermal processing from 550°to 930°K, respectively. With that, the wafer temperature prediction error in compliance with developed mathematical model makes less than 2.3 %. The work results can be used when developing new procedures of rapid thermal processing for silicon wafers.


1995 ◽  
Vol 389 ◽  
Author(s):  
Peter Y. Wong ◽  
Ioannis N. Miaoulis ◽  
Cynthia G. Madras

ABSTRACTTemperature measurements and processing uniformity continue to be major issues in Rapid Thermal Processing. Spatial and temporal variations in thermal radiative properties of the wafer surface are sources of non-uniformities and dynamic variations. These effects are due to changes in spectral distribution (wafer or heat source), oxidation, epitaxy, silicidation, and other microstructural transformations. Additionally, other variations are induced by the underlying (before processing) and developing (during processing) patterns on the wafer. Numerical simulations of Co silicidation that account for these factors are conducted to determine the radiative properties, heat transfer dynamics, and resultant processing uniformity.


1996 ◽  
Vol 429 ◽  
Author(s):  
R. Bremensdorfer ◽  
S. Marcus ◽  
Z. Nenyei

AbstractState of the art rapid thermal processing is able to produce a lateral thermal homogeneity which is within the inherent resolution limits of current meterology. For the most commonly used direct or indirect control methods such as multiple thermocouple measurements, rapid thermal oxidation (RTO), or rapid thermal annealing (RTA) of plain semiconductor wafers this limit is ± 2°C. As homogeneity requirements approach those limits, pattern induced non-uniformities are getting more important.In order to achieve rapid heating and high substrate temperatures in RTP, heater and substrate are not in equilibrium and their emission spectra differ considerably. Under such circumstances laterally varying optical characteristics on the substrate itself imply thermal non-uniformities. The influence of patterns on a silicon wafer surface on the temperature uniformity is studied. Passive patterns showing interference effects were formed out of thermal oxide and Si3N4. RTO and RTA, as well as embedded thermocouples were used for temperature measurement. The data presented show that major non-uniformities due to interference effects can be reduced by restricting the energy transfer through the patterned side of the wafer. It is shown that independent top and bottom heater bank control and controlled thermal kinetics are suitable methods to reduce the pattern related process non-uniformities.


1993 ◽  
Vol 303 ◽  
Author(s):  
Yur-Tsai Lin ◽  
Ravi Subrahmanyan ◽  
A. R. Sitaram

ABSTRACTModeling and simulation of rapid thermal processing has been studied extensively in the past. This work presents the results of a combined simulation and measurement study of a commercial multilamp RTP chamber. The simulations were used to estimate the contributions of different geometrical, material, process, and physical effects on temperature uniformity. The physical effects considered in the simulations included radiation, thermal conduction, transient effects during ramp up and cool down and the effects of patterns on the wafer surface. The effects were corroborated by direct temperature measurements using thermocouple embedded wafers, and the results were used to reliably calculate stress effects. The stress distributions were determined analytically in cases without surface films on the wafer. In the case of wafers with surface films, stress distributions were calculated based on thermal strains. This study allows us to concentrate efforts on increasing temperature uniformity to those areas where the greatest benefits in terms of yield and film uniformity can be obtained.


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