scholarly journals Means and Methods of Efficiency Estimation of Video Stream Transmission Based on GigE Vision Technology Using Application Processor

2021 ◽  
Vol 26 (3) ◽  
Author(s):  
Oleh V. Kuzhylnyi ◽  
Tymofii A. Kodniev ◽  
Anton Yuriiovych Varfolomieiev ◽  
Ihor Vsevolodovych Mikhailenko
Keyword(s):  
Community Support ◽  
Video Stream ◽  
General Purpose ◽  
Raspberry Pi ◽  
Single Board Computer ◽  
General Purpose Processor ◽  
Computing Platform ◽  
Image Capturing ◽  
Efficiency Estimation ◽  
Processor Cores

The paper investigates the possibility of efficient implementation of a GigE Vision compatible video stream source on a computing platform based on a system-on-a-chip with general-purpose ARM processor cores. In particular, to implement the aforementioned video source, a proprietary prototype of a GigE Vision compatible camera was developed based on the Raspberry Pi 4 single-board computer. This computing platform was chosen due to its widespread use and wide community support. The software part of the camera is implemented using the Video4Linux and Aravis libraries. The first library is used for the primary image capturing from a video sensor connected to a single board computer. The second library is intended for forming and transmission of video stream frames compatible with GigE Vision technology over the network. To estimate the delays in the transmission of a video stream over an Ethernet channel, a methodology based on the Precise Time Protocol (PTP) has been proposed and applied. During the experiments, it was found that the software implementation of a GigE Vision compatible camera on single-board computers with general-purpose processor cores is quite promising. Without additional optimization, such an implementation can be successfully used to transmit small frames (with a resolution of up to 640 × 480 pixels), giving a delay less than 10 ms. At the same time, some additional optimizations may be required to transmit larger frames. Namely, a MTU (maximum transmission unit) size value plays the crucial role in latency formation. Thus, to implement a faster camera, it is necessary to select a platform that supports the largest possible MTU (unfortunately, it turned out that it is not possible with Raspberry Pi 4, as it supports relatively small MTU size of up to 2000 bytes). In addition, the image format conversion procedure can noticeably affect the delay. Therefore, it is highly desirable to avoid any frame processing on the transmitter side and, if it is possible, to broadcast raw images. If the conversion of the frame format is necessary, the platform should be chosen so that there are free computing cores on it, which will permit to distribute all necessary frame conversions between these cores using parallelization techniques.

Design and Implementation of Low Energy Wireless Network Nodes based on Hardware Compression Acceleration

2019 ◽  
Vol 12 ◽  
Author(s):  
Hui Yang ◽  
Anand Nayyar
Keyword(s):  
Energy Consumption ◽  
Data Compression ◽  
Energy Saving ◽  
Optimization Design ◽  
Hardware Acceleration ◽  
Transmission Efficiency ◽  
General Purpose ◽  
Storage Space ◽  
General Purpose Processor ◽  
Compression Time

: In the fast development of information, the information data is increasing in geometric multiples, and the speed of information transmission and storage space are required to be higher. In order to reduce the use of storage space and further improve the transmission efficiency of data, data need to be compressed. processing. In the process of data compression, it is very important to ensure the lossless nature of data, and lossless data compression algorithms appear. The gradual optimization design of the algorithm can often achieve the energy-saving optimization of data compression. Similarly, The effect of energy saving can also be obtained by improving the hardware structure of node. In this paper, a new structure is designed for sensor node, which adopts hardware acceleration, and the data compression module is separated from the node microprocessor.On the basis of the ASIC design of the algorithm, by introducing hardware acceleration, the energy consumption of the compressed data was successfully reduced, and the proportion of energy consumption and compression time saved by the general-purpose processor was as high as 98.4 % and 95.8 %, respectively. It greatly reduces the compression time and energy consumption.

scholarly journals Lightweight Blockchain Processing. Case Study: Scanned Document Tracking on Tezos Blockchain

2021 ◽  
Vol 11 (15) ◽  
pp. 7169
Author(s):  
Mohamed Allouche ◽  
Tarek Frikha ◽  
Mihai Mitrea ◽  
Gérard Memmi ◽  
Faten Chaabane
Keyword(s):  
Load Balancing ◽  
Relative Error ◽  
Execution Time ◽  
General Purpose ◽  
Experimental Results ◽  
Raspberry Pi ◽  
Embedded Platform ◽  
Memory Resources ◽  
Processing Solution

To bridge the current gap between the Blockchain expectancies and their intensive computation constraints, the present paper advances a lightweight processing solution, based on a load-balancing architecture, compatible with the lightweight/embedding processing paradigms. In this way, the execution of complex operations is securely delegated to an off-chain general-purpose computing machine while the intimate Blockchain operations are kept on-chain. The illustrations correspond to an on-chain Tezos configuration and to a multiprocessor ARM embedded platform (integrated into a Raspberry Pi). The performances are assessed in terms of security, execution time, and CPU consumption when achieving a visual document fingerprint task. It is thus demonstrated that the advanced solution makes it possible for a computing intensive application to be deployed under severely constrained computation and memory resources, as set by a Raspberry Pi 3. The experimental results show that up to nine Tezos nodes can be deployed on a single Raspberry Pi 3 and that the limitation is not derived from the memory but from the computation resources. The execution time with a limited number of fingerprints is 40% higher than using a classical PC solution (value computed with 95% relative error lower than 5%).

scholarly journals SoC-FPGA systems for the acquisition and processing of electroencephalographic signals

2021 ◽  
Vol 10 (3) ◽  
pp. 237
Author(s):  
Matias Javier Oliva ◽  
Pablo Andrés García ◽  
Enrique Mario Spinelli ◽  
Alejandro Luis Veiga
Keyword(s):  
Embedded System ◽  
Real Time ◽  
General Purpose ◽  
System Response ◽  
Single Chip ◽  
Real Time Processing ◽  
General Purpose Processor ◽  
Time Operation ◽  
Electroencephalographic Signals ◽  
High Level

<span lang="EN-US">Real-time acquisition and processing of electroencephalographic signals have promising applications in the implementation of brain-computer interfaces. These devices allow the user to control a device without performing motor actions, and are usually made up of a biopotential acquisition stage and a personal computer (PC). This structure is very flexible and appropriate for research, but for final users it is necessary to migrate to an embedded system, eliminating the PC from the scheme. The strict real-time processing requirements of such systems justify the choice of a system on a chip field-programmable gate arrays (SoC-FPGA) for its implementation. This article proposes a platform for the acquisition and processing of electroencephalographic signals using this type of device, which combines the parallelism and speed capabilities of an FPGA with the simplicity of a general-purpose processor on a single chip. In this scheme, the FPGA is in charge of the real-time operation, acquiring and processing the signals, while the processor solves the high-level tasks, with the interconnection between processing elements solved by buses integrated into the chip. The proposed scheme was used to implement a brain-computer interface based on steady-state visual evoked potentials, which was used to command a speller. The first tests of the system show that a selection time of 5 seconds per command can be achieved. The time delay between the user’s selection and the system response has been estimated at 343 µs.</span>

scholarly journals An Approach to the Construction of a Network Processing Unit

2019 ◽  
Vol 26 (1) ◽  
pp. 39-62
Author(s):  
Stanislav O. Bezzubtsev ◽  
Vyacheslav V. Vasin ◽  
Dmitry Yu. Volkanov ◽  
Shynar R. Zhailauova ◽  
Vladislav A. Miroshnik ◽  
...  
Keyword(s):  
Simulation Model ◽  
General Purpose ◽  
Network Processor ◽  
Processing Unit ◽  
Use Case ◽  
General Purpose Processor ◽  
Software Products ◽  
Processor Architectures ◽  
Advantages And Disadvantages ◽  
Processor Unit

The paper proposes the architecture and basic requirements for a network processor for OpenFlow switches of software-defined networks. An analysis of the architectures of well-known network processors is presented − NP-5 from EZchip (now Mellanox) and Tofino from Barefoot Networks. The advantages and disadvantages of two different versions of network processor architectures are considered: pipeline-based architecture, the stages of which are represented by a set of general-purpose processor cores, and pipeline-based architecture whose stages correspond to cores specialized for specific packet processing operations. Based on a dedicated set of the most common use case scenarios, a new architecture of the network processor unit (NPU) with functionally specialized pipeline stages was proposed. The article presents a description of the simulation model of the NPU of the proposed architecture. The simulation model of the network processor is implemented in C ++ languages using SystemC, the open-source C++ library. For the functional testing of the obtained NPU model, the described use case scenarios were implemented in C. In order to evaluate the performance of the proposed NPU architecture a set of software products developed by KM211 company and the KMX32 family of microcontrollers were used. Evaluation of NPU performance was made on the basis of a simulation model. Estimates of the processing time of one packet and the average throughput of the NPU model for each scenario are obtained.

scholarly journals Determinación del factor de potencia mediante el uso de SBC en clientes

2019 ◽  
Vol 15 (2) ◽  
Author(s):  
Luis Tipán ◽  
José Rumipamba
Keyword(s):  
Raspberry Pi ◽  
Single Board Computer

El entregar un servicio eléctrico de calidad es el principal objetivo de las empresas distribuidoras de energía. Existen problemas de afección en la distribución de energía y uno de ellos son los efectos negativos causados por los armónicos presentes en las cargas lineales y no lineales utilizadas por clientes residenciales e industriales, afectándose directamente en forma negativa el factor de potencia. En este trabajo se mide el factor de potencia producido por cargas típicas que se encuentran en áreas residenciales por medio de un medidor inteligente basado el uso de SBC (Single Board Computer), como son la Raspberry Pi y el Arduino. Además, se evalúan los efectos producidos por este factor de potencia para luego determinar su influencia en la distorsión de voltaje en un sistema de distribución.

scholarly journals MEDIA PEMBELAJARAN PEMANCAR WIRELESS FM MENGGUNAKAN RASPBERRY PI

2020 ◽  
Vol 11 (1) ◽  
pp. 257-262
Author(s):  
Solekhan Solekhan ◽  
Mohammad Iqbal
Keyword(s):  
Software Defined Radio ◽  
Raspberry Pi ◽  
Single Board Computer

Media pembelajaran merupakan alat bantu yang diperlukan untuk menambah pemahaman dalam pembelajaran. Pemancaran gelombang FM, yang merupakan sebagian dalam Pengolahan Sinyal tanpa kabel, dibutuhkan dalam pemahaman pemancaran gelombang Radio. Raspberry Pi yang merupakan Single Board Computer, dapat diprogram dengan mudah dan memiliki keluwesan dalam penggunaannya. Dalam penelitian ini Raspberry dimanfaatkan penggunaannya sebagai pemancar FM. Proses pemancaran dilakukan dengan memanfaatkan Software Defined Radio. Dari hasil pengujian, pengubahan variasi frekuensi pemancaran FM dapat dilakukan dengan mudah, dan mampu memancarkan gelombang FM dengan baik.  

scholarly journals Rancang bangun penjejak posisi matahari menggunakan kamera dan single board computer

2021 ◽  
Vol 1 (1) ◽  
pp. 43-50
Author(s):  
Faisal Wahab
Keyword(s):  
Raspberry Pi ◽  
Single Board Computer

Energi matahari adalah sumber energi terbesar yang ada di muka bumi ini. Panel surya merupakan sebuah peranti elektronik yang dapat memanfaatkan energi dari sinar matahari untuk dikonversi menjadi energi listrik. Semakin besar permukaan panel surya tersinari cahaya matahari, maka energi listrik yang dihasilkan lebih besar. Makalah ini memaparkan rancang bangun penjejak matahari menggunakan kamera sebagai pendeteksi posisi matahari dengan modul Raspberry pi sebagai kendali untuk pengolahan citra. Pergerakan penjejak posisi matahari ini menggunakan dua aksis, yaitu pitch dan roll. Aktuator yang digunakan untuk mengikuti posisi matahari adalah dua buah motor DC dengan jenis linier aktuator. Hasil dari pengujian menunjukan bahwa kamera dapat mendeteksi titik cahaya menggunakan pengolahan citra pada modul Raspberry pi. Kemudian rangka penjejak sinar matahari berhasil menuju posisi yang diinginkan yaitu pada titik tengah kamera dengan menggerakan dua buah linier aktuator melalui driver motor.

scholarly journals Vision based hardware-software real-time control system for autonomous landing of an UAV

2020 ◽  
Author(s):  
Krzysztof Blachut ◽  
Hubert Szolc ◽  
Mateusz Wasala ◽  
Tomasz Kryjak ◽  
Marek Gorgon
Keyword(s):  
Control System ◽  
Real Time ◽  
Heterogeneous Computing ◽  
Computing System ◽  
Video Stream ◽  
Real Time Control ◽  
Time Data ◽  
Autonomous Landing ◽  
Computing Platform ◽  
Time Control

In this paper we present a vision based hardware-software control system enabling autonomous landing of a mul-tirotor unmanned aerial vehicle (UAV). It allows the detection of a marked landing pad in real-time for a 1280 x 720 @ 60 fps video stream. In addition, a LiDAR sensor is used to measure the altitude above ground. A heterogeneous Zynq SoC device is used as the computing platform. The solution was tested on a number of sequences and the landing pad was detected with 96% accuracy. This research shows that a reprogrammable heterogeneous computing system is a good solution for UAVs because it enables real-time data stream processing with relatively low energy consumption.

scholarly journals PERANCANGAN SISTEM DETEKSI OBJEK PADA ROBOT KRSBI BERBASIS MINI PC RASPBERRY PI 3

2019 ◽  
Vol 12 (1) ◽  
pp. 56-64
Author(s):  
Ilfan Sugianda ◽  
Thamrin Thamrin
Keyword(s):  
Image Processing ◽  
Image Data ◽  
Raspberry Pi ◽  
Process Data ◽  
Single Board Computer ◽  
Object Based ◽  
Football Match ◽  
Omni Wheel ◽  
Python Programming ◽  
Camera Sensor

KRSBI Wheeled is One of the competitions on the Indonesian Robot Contest,. It is a football match that plays 3 robot full autonomous versus other teams. The robot uses a drive in the form of wheels that are controlled in such a way, to be able to do the work the robot uses a camera sensor mounted on the front of the robot, while for movement in the paper author uses 3 omni wheel so the robot can move in all directions to make it easier towards the ball object. For the purposes of image processing and input and output processing the author uses a Single Board Computer Raspberry PI 3 are programmed using the Python programming language with OpenCV image processing library, to optimize the work of Single Board Computer(SBC) Raspberry PI 3 Mini PC assisted by the Microcontroller Arduino Mega 2560. Both devices are connected serially via the USB port. Raspberry PI will process the image data obtained webcam camera input. Next, If the ball object can be detected the object's position coordinates will be encoded in character and sent to the Microcontroller Arduino Mega 2560. Furthermore, Arduino mega 2560 will process data to drive the motors so that can move towards the position of the ball object. Based on the data from the maximum distance test results that can be read by the camera sensor to be able to detect a ball object is �5 meters with a maximum viewing angle of 120 �.

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