Crosstalk Noise Analysis in Coupled On-Chip Interconnects Using MRTD Technique

Author(s):  
Bhaskar Gugulothu ◽  
Rajendra Naik Bhukya

Abstract In this paper, the Crosstalk noise analysis of coupled on-chip interconnects have been analyzed. The multiresolution time-domain method (MRTD) is used to analyze the crosstalk noise model. The crosstalk induced propagation time delay and crosstalk peak voltage on the victim line of interconnects have been determined and compared to those of the conventional finite difference time domain (FDTD) method and validated with HSPICE simulations at the 22nm technology node. The results of the proposed method shows that crosstalk induced propagation delay in dynamic in-phase, out-phase and peak voltage timing, as well as the peak voltage value for functional crosstalk in the copper interconnects are an average error of less than 0.53% for the proposed model and HSPICE simulations. The results of the proposed model are closely similar to those of HSPICE simulations. Electromagnetic interference and electromagnetic compatibility of on-chip interconnects can also be addressed using the proposed method.

Author(s):  
Shashank Rebelli ◽  
Bheema Rao Nistala

Purpose This paper aims to model the coupled on-chip Copper (Cu) interconnects by using the multiresolution time-domain (MRTD) method. Design/methodology/approach The proposed model is a wavelet-based numerical method for analyzing signal integrity and propagation delay of coupled on-chip interconnects. Moreover, the dependency of crosstalk noise and delay on coupling parasitics (L12, C12) are analyzed. Findings The proposed MRTD method captures the behaviour of propagation delay and peak crosstalk noise on victim line against coupling parasitics, which is in close agreement with that of H simulation program with integrated circuit emphasis (HSPICE). The average error for the proposed model is less than 1 per cent with respect to HSPICE for the estimation of peak crosstalk noise voltage. Practical implications Simulations are performed using HSPICE and compared with those performed using the proposed MRTD method for global interconnect length with 130-nm technology, where the computations of the proposed model are carried out using Matlab. Originality/value The MRTD method with its unique features is tailored for modelling interconnects. To build further credence to this and its profound existence in the latest state-of-art works, simulations of crosstalk noise and propagation delay, for coupled Cu interconnect lines, using MRTD and finite-difference time-domain (FDTD) are executed. The results illustrated the dominance of MRTD method over FDTD in terms of accuracy.


2009 ◽  
Vol 18 (07) ◽  
pp. 1263-1285 ◽  
Author(s):  
GUOQING CHEN ◽  
EBY G. FRIEDMAN

With higher operating frequencies, transmission lines are required to model global on-chip interconnects. In this paper, an accurate and efficient solution for the transient response at the far end of a transmission line based on a direct pole extraction of the system is proposed. Closed form expressions of the poles are developed for two special interconnect systems: an RC interconnect and an RLC interconnect with zero driver resistance. By performing a system conversion, the poles of an interconnect system with general circuit parameters are solved. The Newton–Raphson method is used to further improve the accuracy of the poles. Based on these poles, closed form expressions for the step and ramp response are determined. Higher accuracy can be obtained with additional pairs of poles. The computational complexity of the model is proportional to the number of pole pairs. With two pairs of poles, the average error of the 50% delay is 1% as compared with Spectre simulations. With ten pairs of poles, the average error of the 10%-to-90% rise time and the overshoots is 2% and 1.9%, respectively. Frequency dependent effects are also successfully included in the proposed method and excellent match is observed between the proposed model and Spectre simulations.


2011 ◽  
Vol 110-116 ◽  
pp. 971-976
Author(s):  
Hong You Wang ◽  
Jin Guang Li

Micro-strip line is a kind of transmission line that is the most widely used in microwave integrated circuit. With the development of microwave integrated circuits and the increasing work frequency of the micro-strip line, a higher requirement for its electromagnetic compatibility has been raised. Finite-Difference Time-Domain (FDTD) method has characteristics of good adaptability in the analysis of electromagnetic compatibility issues and superiority in complexity of the structure modeling. For these reasons, this Article uses FDTD method which is widely used in electromagnetic field calculation to analyze the time-domain of micro-strip line, calculates its current and voltage induced in ports and discuss the response feature under different radiation conditions.


2014 ◽  
Vol 12 (3) ◽  
pp. 364-373
Author(s):  
Devendra Kumar Sharma ◽  
Brajesh Kumar Kaushik ◽  
R.K. Sharma

Purpose – The purpose of this paper is to propose an analytical model for estimating propagation delay in coupled resistance-inductance-capacitance (RLC) interconnects. Design/methodology/approach – With higher frequency of operation, longer length of interconnect and fast transition time of the signal, the resistor capacitor (RC) models are not sufficient to estimate the delay accurately. To mitigate this problem, accurate delay models for coupled interconnects are required. In this paper, an analytical model for estimation of interconnect delay is developed for simultaneously switching lines. Two distributed RLC lines coupled inductively and capacitively are considered. To validate the proposed model, SPICE results are compared with the proposed analytical results. Each line in the coupled structure is terminated by a capacitive load of 30fF. The driving signal is considered symmetrical with equal rise and fall time of 5 ps and OFF/ON time of 45 ps. The model is validated for both in-phase and out of phase switching of lines. Findings – It is observed that the model works well for both the phases of inputs switching. The derived expressions of delay exhibit complete physical insight, and the results obtained are in excellent agreement with SPICE results. Comparison of analytical delay with SPICE delay shows an average error of < 2.7 per cent. Originality/value – The analytical expressions for interconnect delay are derived for the first time under simultaneously switching scenario. This model is useful to estimate delay across the inductively and capacitively coupled interconnects.


2016 ◽  
Vol 34 (15) ◽  
pp. 3550-3562 ◽  
Author(s):  
Yiyuan Xie ◽  
Tingting Song ◽  
Zhendong Zhang ◽  
Chao He ◽  
Jiachao Li ◽  
...  

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