Electron and Positron State in Layered Nanostructures «Metal – Insulator»

2016 ◽  
Vol 8 (4(1)) ◽  
pp. 04050-1-04050-9 ◽  
Author(s):  
А. V. Babich ◽  
◽  
P. V. Vakula ◽  
А. V. Korotun ◽  
V. I. Reva ◽  
...  
2004 ◽  
Vol 114 ◽  
pp. 277-281 ◽  
Author(s):  
J. Wosnitza ◽  
J. Hagel ◽  
O. Stockert ◽  
C. Pfleiderer ◽  
J. A. Schlueter ◽  
...  

2015 ◽  
Vol 8 (2) ◽  
pp. 2084-2093 ◽  
Author(s):  
PROLOY TARAN DAS ◽  
Arun Kumar Nigam ◽  
Tapan Kumar Nath

Nano-dimensional effects on electronic-, magneto-transport properties of granular ferromagnetic insulating (FMI) Pr0.8Sr0.2MnO3 (PSMO) manganite (down to 40 nm) have been investigated in details. From the electronic and magnetic transport properties, a metallic state has been observed in grain size modulation by suppressing the ferromagnetic insulating state of PSMO bulk system. A distinct metal-insulator transition (MIT) temperature around 150 K has been observed in all nanometric samples. The observed insulator to metallic transition with size reduction can be explained with surface polaron breaking model, originates due to enhanced grain surface disorder. This proposed phenomenological polaronic model plays a significant role to understand the polaronic destabilization process on the grain surface regime of these phase separated nano-mangnatie systems. Temperature dependent resistivity and magnetoresistance data in presence of external magnetic fields are investigated in details with various compatible models.


2017 ◽  
Author(s):  
Varun Bheemireddy

The two-dimensional(2D) materials are highly promising candidates to realise elegant and e cient transistor. In the present letter, we conjecture a novel co-planar metal-insulator-semiconductor(MIS) device(capacitor) completely based on lateral 2D materials architecture and perform numerical study of the capacitor with a particular emphasis on its di erences with the conventional 3D MIS electrostatics. The space-charge density features a long charge-tail extending into the bulk of the semiconductor as opposed to the rapid decay in 3D capacitor. Equivalently, total space-charge and semiconductor capacitance densities are atleast an order of magnitude more in 2D semiconductor. In contrast to the bulk capacitor, expansion of maximum depletion width in 2D semiconductor is observed with increasing doping concentration due to lower electrostatic screening. The heuristic approach of performance analysis(2D vs 3D) for digital-logic transistor suggest higher ON-OFF current ratio in the long-channel limit even without third dimension and considerable room to maximise the performance of short-channel transistor. The present results could potentially trigger the exploration of new family of co-planar at transistors that could play a signi significant role in the future low-power and/or high performance electronics.<br>


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