Fault Localization in Contact Level by Using Conductive Atomic Force Microscopy

Author(s):  
Jon C. Lee ◽  
J. H. Chuang

Abstract As integrated circuits (IC) have become more complicated with device features shrinking into the deep sub-micron range, so the challenge of defect isolation has become more difficult. Many failure analysis (FA) techniques using optical/electron beam and scanning probe microscopy (SPM) have been developed to improve the capability of defect isolation. SPM provides topographic imaging coupled with a variety of material characterization information such as thermal, magnetic, electric, capacitance, resistance and current with nano-meter scale resolution. Conductive atomic force microscopy (C-AFM) has been widely used for electrical characterization of dielectric film and gate oxide integrity (GOI). In this work, C-AFM has been successfully employed to isolate defects in the contact level and to discriminate various contact types. The current mapping of C-AFM has the potential to identify micro-leaky contacts better than voltage contrast (VC) imaging in SEM. It also provides I/V information that is helpful to diagnose the failure mechanism by comparing I/V curves of different contact types. C-AFM is able to localize faulty contacts with pico-amp current range and to characterize failure with nano-meter scale lateral resolution. C-AFM should become an important technique for IC fault localization. FA examples of this technique will be discussed in the article.

Author(s):  
Lucile C. Teague Sheridan ◽  
Linda Conohan ◽  
Chong Khiam Oh

Abstract Atomic force microscopy (AFM) methods have provided a wealth of knowledge into the topographic, electrical, mechanical, magnetic, and electrochemical properties of surfaces and materials at the micro- and nanoscale over the last several decades. More specifically, the application of conductive AFM (CAFM) techniques for failure analysis can provide a simultaneous view of the conductivity and topographic properties of the patterned features. As CMOS technology progresses to smaller and smaller devices, the benefits of CAFM techniques have become apparent [1-3]. Herein, we review several cases in which CAFM has been utilized as a fault-isolation technique to detect middle of line (MOL) and front end of line (FEOL) buried defects in 20nm technologies and beyond.


2010 ◽  
Vol 30 (7) ◽  
pp. 1761-1764 ◽  
Author(s):  
Martin Schloffer ◽  
Christian Teichert ◽  
Peter Supancic ◽  
Andrei Andreev ◽  
Yue Hou ◽  
...  

2008 ◽  
Vol 112 (49) ◽  
pp. 19680-19685 ◽  
Author(s):  
Pavels Birjukovs ◽  
Nikolay Petkov ◽  
Ju Xu ◽  
Janis Svirksts ◽  
John J. Boland ◽  
...  

2010 ◽  
Vol 108 (11) ◽  
pp. 114308 ◽  
Author(s):  
P. Gundersen ◽  
K. O. Kongshaug ◽  
E. Selvig ◽  
R. Haakenaasen

2006 ◽  
Vol 89 (3) ◽  
pp. 032107 ◽  
Author(s):  
Olivier Douhéret ◽  
Laurence Lutsen ◽  
Ann Swinnen ◽  
Martin Breselge ◽  
Koen Vandewal ◽  
...  

2009 ◽  
Vol 1232 ◽  
Author(s):  
Raffaella Lo Nigro ◽  
Patrick Fiorenza ◽  
Vito Raineri

AbstractElectrical characterization of CaCu3Ti4O12 (CCTO) ceramics with scanning probe based techniques has been carried out. In particular, conductive atomic force microscopy (C-AFM) and scanning impedance microscopy (SIM) have been used to demonstrate the presence, shape and size in CCTO ceramics of the different electrically domains, both at the grain boundaries and within the grains. The electrical characteristics of single grains and of single domains have been evaluated and it has been observed that the conductive grains are surrounded by insulating grain boundaries.


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