scholarly journals Designing Electronic Systems Using SystemC and SystemC–AMS

Author(s):  
V. A. Alekhin

Current trends in the design of electronic systems is the use of embedded systems based on systems on a chip (System-on-Chip (SoC)) or (VLSI SoC). The paper discusses the design features of electronic systems on a chip using the SystemC design and verification language. For the joint design and simulation of digital systems hardware and software, seven modeling levels are presented and discussed: executable specification, disabled functional model, temporary functional model, transaction-level model, behavioral hardware model, accurate hardware model, register transfer model. The SystemC design methodology with functional verification is presented, which reduces development time.The architecture of the SystemC language and its main components are shown. The expansion of SystemC–AMS for analog and mixed analog-digital signals and its use cases in the design of electronic systems are considered. Computing models are discussed: temporary data stream (TDF), linear signal stream (LSF) and electric linear networks (ELN). The architecture of the SystemC–AMS language standard is shown and examples of its application are given. It is shown that the design languages SystemC and SystemC–AMS are widely used by leading developers of computer-aided design systems for electronic devices.

2018 ◽  
Vol 7 (2.16) ◽  
pp. 57
Author(s):  
G Prasad Acharya ◽  
M Asha Rani

The increased demand for processor-level parallelism has many-folded the challenges for SoC designers to design, simulate and verify/validate today’s Multi-core System-On-Chip (SoC) due to the increased system complexity. There is also a need to reduce the design cycle time to produce a complex multi-core SOC system thereby the product can be brought into the market within an affordable time. The Computer-Aided Design (CAD) tools and Field Programmable Gate Arrays (FPGAs) provide a solution for rapidly prototyping and validating the system. This paper presents an implementation of multi-core SoC consisting of 6 Xilinx Micro-Blaze soft-core processors integrated to the Zynq Processing System (PS) using IP Integrator and these cores will be communicated through AXI bus. The functionality of the system is verified using Micro-Blaze system debugger. The hardware framework for the implemented system is implemented and verified on FPGA.  


SIMULATION ◽  
1964 ◽  
Vol 2 (3) ◽  
pp. R-3-R-20
Author(s):  
Douglas T. Ross ◽  
Jorge E. Rodriguez

This work has been made possible through the support extended to the Massachusetts Institute of Technology, Electronic Systems Laboratory, by the Manufacturing Technology Laboratory, ASD, Wright-Patterson Air Force Base, under Contract No. AF-33(600)- 42859. It is published for technical information only and does not necessarily represent the recommendations or conclusions of the sponsoring agency.


2021 ◽  
Author(s):  
Ehsan Aghapour ◽  
A. Pathania ◽  
Gayathri Ananthanarayanan

<div>State-of-the-art Heterogeneous System on Chips (HMPSoCs) can perform on-chip embedded inference on its CPU and GPU. Multi-component pipelining is the method of choice to provide high-throughput Convolutions Neural Network (CNN) inference on embedded platforms. In this work, we provide details for the first CPU-GPU pipeline design for CNN inference called Pipe-All. Pipe-All uses the ARM-CL library to integrate an ARM big.Little CPU with an ARM Mali GPU. Pipe-All is the first three-stage CNN inference pipeline design with ARM’s big CPU cluster, Little CPU cluster, and Mali GPU as its stages. Pipe-All provides on average 75.88% improvement in inference throughput (over peak single-component inference) on Amlogic A311D HMPSoC in Khadas Vim 3 embedded platform. We also provide an open-source implementation for Pipe-All.</div><div>This paper is submitted to IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) as a transaction brief paper (5 pages).</div>


Author(s):  
S.P. Levitan ◽  
P.J. Marchand ◽  
T.P. Kurzweg ◽  
M.A. Rempel ◽  
D.M. Chiarulli ◽  
...  

2020 ◽  
pp. 321-331
Author(s):  
Divya Zindani ◽  
Kaushik Kumar

The chapter proposes an integrated manufacturing system consisting of three main components: digital prototyping, physical prototyping, and lost core technology. The integrated system combines the beneficial aspects of computer-aided design, computer-aided engineering, rapid prototyping, and rapid tooling. The proposed integrated system is an attempt to compress the product development time while saving cost. The system can be efficient in designing of mold, parts with complex ducts and cavities, and carrying out design analysis through optimization and simulations. The system is therefore an attempt to minimize the waste of material that occurs in the development of a product and is therefore an efficient green technology for the manufacturing industries.


2018 ◽  
Vol 24 (2) ◽  
pp. 361-367 ◽  
Author(s):  
R. Hunter Montgomery ◽  
Kelsey Phelan ◽  
Sawyer D. Stone ◽  
Francois Decuir ◽  
Bryant C. Hollins

Purpose This paper aims to investigate the applicability of 3D-printed molds to be used as a substitute for photolithography in the formation of polymer-based stamps. It proposes leveraging 3D printing as a rapid prototyping tool to be applied to microfluidic fabrication. Design/methodology/approach Different designs are created using computer-aided design (CAD) software and printed via Makerbot 3D printer. The molds serve as negative reliefs for a PDMS stamp. The stamp is used to apply paraffin wax to chromatography paper, creating hydrophobic barriers and hydrophilic channels. The minimum functional channel widths and barrier widths are determined for the method. Findings The method is demonstrated to be effective for bypassing the more cost-prohibitive photolithography approach for rapid paper microdevice fabrication. This approach produces functional channels that can be used for on-chip analytical assays. The minimum functional barrier widths and minimum functional channel widths are in good agreement with other published methods for paper-based microchannel fabrication. Research limitations/implications The approach cannot generate the high-resolution structures possible with photolithography. Therefore, if higher resolutions are needed for a particular application, this approach is not the best. Practical implications The simplicity of the approach introduces an affordable method to create disposable devices that can be used at the point of testing. Originality/value The paper satisfies a need for inexpensive, rapid prototyping of paper-based devices. The method is simple and can be used as a tool for introducing labs to microfluidics research.


Author(s):  
Divya Zindani ◽  
Kaushik Kumar

The chapter proposes an integrated manufacturing system consisting of three main components: digital prototyping, physical prototyping, and lost core technology. The integrated system combines the beneficial aspects of computer-aided design, computer-aided engineering, rapid prototyping, and rapid tooling. The proposed integrated system is an attempt to compress the product development time while saving cost. The system can be efficient in designing of mold, parts with complex ducts and cavities, and carrying out design analysis through optimization and simulations. The system is therefore an attempt to minimize the waste of material that occurs in the development of a product and is therefore an efficient green technology for the manufacturing industries.


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