scholarly journals ANALISIS PERFORMA CORE FRAMEWORK IOS PADA APLIKASI VISUALISASI GENERAL-GRAPH MENGGUNAKAN PERANGKAT MOBILE

2020 ◽  
Vol 6 (2) ◽  
pp. 61-66
Author(s):  
Shumaya Resty Ramadhani
Keyword(s):  
Graphic Processing Unit ◽  
Random Access ◽  
Random Access Memory ◽  
Central Processing Unit ◽  
Processing Unit ◽  
Access Memory ◽  
General Graph ◽  
Central Processing ◽  
Core Framework ◽  
Graphic Processing

Perkembangan teknologi yang pesat membawa perubahan kebiasaan pada pengguna teknologi. Perangkat teknologi ikut berevolusi, mulai dari super komputer hingga smartphone berukuran kecil dengan performa yang sepadan. Banyaknya penikmat teknologi yang beralih kepada piranti cerdas ini membuka peluang pengembangan aplikasi yang cukup besar. Aplikasi mobile harus tetap mampu bekerja secara cepat dan ringan meski dijalankan pada smartphone dengan tipe lama atau spesifikasi terbatas. Terutama aplikasi yang mengusung visualisasi dan animasi untuk menarik minat pengguna. Sistem operasi iOS menyediakan CoreFramework yang mendukung proses pembuatan objek dan animasi dalam jumlah banyak dengan cepat dan ringan. Oleh sebab itu, dibentuklah sebuah aplikasi visualisasi general-graph sederhana dengan implementasi CoreFramework guna menguji seberapa besar pengaruh framework tersebut terhadap kualitas aplikasi, terutama pada perangkat seri lama. Kriteria pengujian menggunakan tiga variabel dasar, yaitu waktu, alokasi Central Processing Unit (CPU) dan Random Access Memory (RAM) yang digunakan. Hasil dari pengujian menunjukkan bahwa meski CoreFramework menggunakan Graphic Processing Unit (GPU) untuk pemrosesannya, tapi setidaknya aplikasi membutuhkan minimal RAM berukuran 2GB pada perangkat smartphone agar responsifitas terjaga. Hal ini disebabkan karena ketika kapasitas RAM kecil, maka aplikasi akan menggunakan alokasi CPU dengan cukup signifikan agar bisa berjalan dengan baik.

Basic Issues

2004 ◽  
Author(s):  
Wesley Petersen ◽  
Peter Arbenz
Keyword(s):  
Memory Performance ◽  
Direct Memory Access ◽  
Random Access ◽  
Random Access Memory ◽  
Memory Systems ◽  
Close Packing ◽  
Memory Access ◽  
Processing Unit ◽  
Access Memory ◽  
Central Processing

Since first proposed by Gordon Moore (an Intel founder) in 1965, his law [107] that the number of transistors on microprocessors doubles roughly every one to two years has proven remarkably astute. Its corollary, that central processing unit (CPU) performance would also double every two years or so has also remained prescient. Figure 1.1 shows Intel microprocessor data on the number of transistors beginning with the 4004 in 1972. Figure 1.2 indicates that when one includes multi-processor machines and algorithmic development, computer performance is actually better than Moore’s 2-year performance doubling time estimate. Alas, however, in recent years there has developed a disagreeable mismatch between CPU and memory performance: CPUs now outperform memory systems by orders of magnitude according to some reckoning [71]. This is not completely accurate, of course: it is mostly a matter of cost. In the 1980s and 1990s, Cray Research Y-MP series machines had well balanced CPU to memory performance. Likewise, NEC (Nippon Electric Corp.), using CMOS (see glossary, Appendix F) and direct memory access, has well balanced CPU/Memory performance. ECL (see glossary, Appendix F) and CMOS static random access memory (SRAM) systems were and remain expensive and like their CPU counterparts have to be carefully kept cool. Worse, because they have to be cooled, close packing is difficult and such systems tend to have small storage per volume. Almost any personal computer (PC) these days has a much larger memory than supercomputer memory systems of the 1980s or early 1990s. In consequence, nearly all memory systems these days are hierarchical, frequently with multiple levels of cache. Figure 1.3 shows the diverging trends between CPUs and memory performance. Dynamic random access memory (DRAM) in some variety has become standard for bulk memory. There are many projects and ideas about how to close this performance gap, for example, the IRAM [78] and RDRAM projects [85]. We are confident that this disparity between CPU and memory access performance will eventually be tightened, but in the meantime, we must deal with the world as it is.

scholarly journals In-Memory Logic Operations and Neuromorphic Computing in Non-Volatile Random Access Memory

Materials ◽  
2020 ◽  
Vol 13 (16) ◽  
pp. 3532 ◽  
Author(s):  
Qiao-Feng Ou ◽  
Bang-Shu Xiong ◽  
Lei Yu ◽  
Jing Wen ◽  
Lei Wang ◽  
...  
Keyword(s):  
Performance Metrics ◽  
Random Access ◽  
Random Access Memory ◽  
Main Memory ◽  
Boolean Logic ◽  
Processing Unit ◽  
Access Memory ◽  
Neuromorphic Circuits ◽  
Von Neumann ◽  
Central Processing

Recent progress in the development of artificial intelligence technologies, aided by deep learning algorithms, has led to an unprecedented revolution in neuromorphic circuits, bringing us ever closer to brain-like computers. However, the vast majority of advanced algorithms still have to run on conventional computers. Thus, their capacities are limited by what is known as the von-Neumann bottleneck, where the central processing unit for data computation and the main memory for data storage are separated. Emerging forms of non-volatile random access memory, such as ferroelectric random access memory, phase-change random access memory, magnetic random access memory, and resistive random access memory, are widely considered to offer the best prospect of circumventing the von-Neumann bottleneck. This is due to their ability to merge storage and computational operations, such as Boolean logic. This paper reviews the most common kinds of non-volatile random access memory and their physical principles, together with their relative pros and cons when compared with conventional CMOS-based circuits (Complementary Metal Oxide Semiconductor). Their potential application to Boolean logic computation is then considered in terms of their working mechanism, circuit design and performance metrics. The paper concludes by envisaging the prospects offered by non-volatile devices for future brain-inspired and neuromorphic computation.

Missing in action: verbal metaphor for information technology

English Today ◽  
2001 ◽  
Vol 17 (3) ◽  
pp. 24-30
Author(s):  
Paul Bruthiaux
Keyword(s):  
Information Technology ◽  
Language Use ◽  
Random Access ◽  
Processing Unit ◽  
Scientific Language ◽  
Access Memory ◽  
Central Processing ◽  
Rapid Spread ◽  
Verbal Metaphor ◽  
Missing In Action

The rapid spread of Information Technology (IT) in recent years and the role it plays in many aspects of our lives has not left language use untouched. A manifestation of this role is the degree of linguistic creativity that has accompanied technological innovation. In English, this creativity is seen in the semantic relabeling of established terms such as web, bug, virus, firewall, etc. Another strategy favored by IT lexifiers is the use of lexical items clustered in heavy premodifying groups, as in random access memory, disk operating system, central processing unit, and countless others (White, 1999). In brief, IT technology – and in particular, the World Wide Web – has made it possible for users to break free of many linguistic codes and conventions (Lemke, 1999).For the linguist, the happy outcome of the spread of IT is that it has created an opportunity to analyze the simultaneous development of technology and the language that encodes it and the influence of one on the other (Stubbs, 1997). To linguists of a broadly functional disposition, this is a chance to confirm the observation that scientific language differs substantially from everyday language. More importantly, it is also a chance to verify the claim made chiefly by Halliday & Martin (1993) that this difference in the characteristics of each of these discourses stems from a radical difference between scientific and common sense construals of the world around us.

Spintronic Processing Unit in Spin Transfer Torque Magnetic Random Access Memory

2019 ◽  
Vol 66 (4) ◽  
pp. 2017-2022 ◽  
Author(s):  
He Zhang ◽  
Wang Kang ◽  
Kaihua Cao ◽  
Bi Wu ◽  
Youguang Zhang ◽  
...  
Keyword(s):  
Random Access ◽  
Random Access Memory ◽  
Spin Transfer Torque ◽  
Spin Transfer ◽  
Processing Unit ◽  
Access Memory ◽  
Magnetic Random Access Memory

The best of both worlds: inflated terms in IT (and other) discourses

English Today ◽  
2003 ◽  
Vol 19 (3) ◽  
pp. 37-43
Author(s):  
Dennis Gailor
Keyword(s):  
Random Access ◽  
Random Access Memory ◽  
Access Memory ◽  
Central Processing ◽  
Intransitive Verb ◽  
Verbal Creativity ◽  
Verb Forms

In the paper to which this study responds, Bruthiaux discussed verbal creativity in IT, ranging from short figurative terms such as bug and virus to such ‘heavy premodifying groups’ as random access memory and central processing memory. He also drew attention to both intransitive verb forms such as Setup is initializing and The menu will repeat, and (most notably) such ‘unaccusative’ constructs as ‘Close this dialog box when download completes’ and ‘Sit back and relax while Windows 98 installs on your computer’. The present paper takes the discussion further in terms of ‘fog’ and ‘inflation’, ‘unaccusatives’, superfluity and excessive Latinity, tautological phrasing, and such lexical curiosities as overwrite used to mean ‘replace’.

scholarly journals Performance Evaluation of SW Algorithm on NVIDIA GeForce GTX TITAN X Graphic Processing Unit (GPU)

2018 ◽  
Vol 12 (2) ◽  
pp. 670
Author(s):  
Ahmad Hasif Azman ◽  
Syed Abdul Mutalib Al Junid ◽  
Abdul Hadi Abdul Razak ◽  
Mohd Faizul Md Idros ◽  
Abdul Karimi Halim ◽  
...  
Keyword(s):  
Performance Evaluation ◽  
Dna Sequence ◽  
Sequence Alignment ◽  
High Performance ◽  
Graphic Processing Unit ◽  
Processing Unit ◽  
Central Processing ◽  
Dna Sequence Alignment ◽  
Algorithm Implementation ◽  
Graphic Processing

Nowadays, the requirement for high performance and sensitive alignment tools have increased after the advantage of the Deoxyribonucleic Acid (DNA) and molecular biology has been figured out through Bioinformatics study. Therefore, this paper reports the performance evaluation of parallel Smith-Waterman Algorithm implementation on the new NVIDIA GeForce GTX Titan X Graphic Processing Unit (GPU) compared to the Central Processing Unit (CPU) running on Intel® CoreTM i5-4440S CPU 2.80GHz. Both of the design were developed using C-programming language and targeted to the respective platform. The code for GPU was developed and compiled using NVIDIA Compute Unified Device Architecture (CUDA). It clearly recorded that, the performance of GPU based computational is better compared to the CPU based. These results indicate that the GPU based DNA sequence alignment has a better speed in accelerating the computational process of DNA sequence alignment.

scholarly journals Enhancement of cloud performance metrics using dynamic degree memory balanced allocation algorithm

2021 ◽  
Vol 22 (3) ◽  
pp. 1697
Author(s):  
Aparna Shashikant Joshi ◽  
Shayamala Devi Munisamy
Keyword(s):  
Load Balancing ◽  
Performance Metrics ◽  
Random Access ◽  
Processing Unit ◽  
Simulation Tool ◽  
Performance Parameters ◽  
Access Memory ◽  
Suitable Host ◽  
Central Processing ◽  
Balanced Allocation

In cloud computing, load balancing among the resources is required to schedule a task, which is a key challenge. This paper proposes a dynamic degree memory balanced allocation (D2MBA) algorithm which allocate virtual machine (VM) to a best suitable host, based on availability of random-access memory (RAM) and microprocessor without interlocked pipelined stages (MIPS) of host and allocate task to a best suitable VM by considering balanced condition of VM. The proposed D2MBA algorithm has been simulated using a simulation tool CloudSim by varying number of tasks and keeping number of VMs constant and vice versa. The D2MBA algorithm is compared with the other load balancing algorithms viz. Round Robin (RR) and dynamic degree balance with central processing unit (CPU) based (D2B_CPU based) with respect to performance parameters such as execution cost, degree of imbalance and makespan time. It is found that the D2MBA algorithm has a large reduction in the performance parameters such as execution cost, degree of imbalance and makespan time as compared with RR and D2B CPU based algorithms

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