scholarly journals Open-Source FPGA Coprocessor for the Doppler Emulation of Moving Fluids

Micromachines ◽  
2021 ◽  
Vol 12 (12) ◽  
pp. 1549
Author(s):  
Stefano Ricci
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Open Source ◽  
Real Time ◽  
Field Programmable Gate Array ◽  
Synthetic Signal ◽  
Doppler System ◽  
Wide Range ◽  
Field Programmable ◽  
Moving Fluid

Embedded systems are nowadays employed in a wide range of application, and their capability to implement calculation-intensive algorithms is growing quickly and constantly. This result is obtained by the exploitation of powerful embedded processors that are often connected to coprocessors optimized for a particular application. This work presents an open-source coprocessor dedicated to the real-time generation of a synthetic signal that mimics the echoes produced by a moving fluid when investigated by ultrasounds. The coprocessor is implemented in a Field Programmable Gate Array (FPGA) device and integrated in an embedded system. The system can replace the complex and inaccurate flow-rigs employed in laboratorial tests of Doppler ultrasound systems and methods. This paper details the coprocessor and its standard interfaces, and shows how it can be integrated in the wider architecture of an embedded system. Experiments showed its capability to emulate a fluid flowing in a pipe when investigated by an echographic Doppler system.

scholarly journals The Design of a 2D Graphics Accelerator for Embedded Systems

Electronics ◽  
2021 ◽  
Vol 10 (4) ◽  
pp. 469
Author(s):  
Hyun Woo Oh ◽  
Ji Kwang Kim ◽  
Gwan Beom Hwang ◽  
Seung Eun Lee
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Real Time ◽  
Line Drawing ◽  
Cmos Process ◽  
Embedded Processor ◽  
Processor Core ◽  
Field Programmable ◽  
The Embedded System ◽  
Graphics Processing

Recently, advances in technology have enabled embedded systems to be adopted for a variety of applications. Some of these applications require real-time 2D graphics processing running on limited design specifications such as low power consumption and a small area. In order to satisfy such conditions, including a specific 2D graphics accelerator in the embedded system is an effective method. This method reduces the workload of the processor in the embedded system by exploiting the accelerator. The accelerator assists the system to perform 2D graphics processing in real-time. Therefore, a variety of applications that require 2D graphics processing can be implemented with an embedded processor. In this paper, we present a 2D graphics accelerator for tiny embedded systems. The accelerator includes an optimized line-drawing operation based on Bresenham’s algorithm. The optimized operation enables the accelerator to deal with various kinds of 2D graphics processing and to perform the line-drawing instead of the system processor. Moreover, the accelerator also distributes the workload of the processor core by removing the need for the core to access the frame buffer memory. We measure the performance of the accelerator by implementing the processor, including the accelerator, on a field-programmable gate array (FPGA), and ascertaining the possibility of realization by synthesizing using the 180 nm CMOS process.

Feature Extraction Acceleration to Stabilize Execution Time for Real-Time Applications in Low-Cost Embedded Systems

2019 ◽  
Vol 29 (06) ◽  
pp. 2020003
Author(s):  
Taek Kyu Kim
Keyword(s):  
Feature Extraction ◽  
Embedded Systems ◽  
Real Time ◽  
Execution Time ◽  
Field Programmable Gate Array ◽  
Low Cost ◽  
Hardware Accelerator ◽  
Simple Arithmetic ◽  
Field Programmable ◽  
Gate Array

Extracted features are widely used for image processing. Many research endeavors have been undertaken to extract significant features of fast moving images. Appropriate algorithm processing is necessary to extract features and provide features to the other modules in real time with low-cost embedded systems. The features from accelerated segment test (FAST) algorithm is renowned for feature extraction. FAST is composed of simple arithmetic operators. In this study, FAST is employed to implement the hardware accelerator in a field-programmable gate array for small embedded systems. Meanwhile, the threshold value in FAST affects the number of extracted features and the execution time. The precarious execution time makes it difficult for the system to schedule the timing of system functions and thus degrades the performance. An appropriate method is necessary to stabilize the execution time. A dynamic threshold controller in a FAST hardware accelerator is thus proposed to enable a stable execution time. A proportional integral controller composed of an adder, subtractor, and shifter is applied for low design implementation costs. The proposed approach occupies 2,263 slice flip-flops, 3,498 look-up tables, and 17 block RAMs in a Xilinx Virtex 5 FX field-programmable gate array. It requires 3.87[Formula: see text]ms for continuous 800×480 images from the KITTI benchmark.

scholarly journals Timing Comparison of the Real-Time Operating Systems for Small Microcontrollers

Symmetry ◽  
2020 ◽  
Vol 12 (4) ◽  
pp. 592 ◽  
Author(s):  
Ioan Ungurean
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Real Time ◽  
Operating Systems ◽  
Experimental Tests ◽  
Wide Range ◽  
Time Requirements ◽  
Basic Services ◽  
The Embedded System ◽  
Embedded Operating Systems

In automatic systems used in the control and monitoring of industrial processes, fieldbuses with specific real-time requirements are used. Often, the sensors are connected to these fieldbuses through embedded systems, which also have real-time features specific to the industrial environment in which it operates. The embedded operating systems are very important in the design and development of embedded systems. A distinct class of these operating systems is real-time operating systems (RTOSs) that can be used to develop embedded systems, which have hard and/or soft real-time requirements on small microcontrollers (MCUs). RTOSs offer the basic support for developing embedded systems with applicability in a wide range of fields such as data acquisition, internet of things, data compression, pattern recognition, diversity, similarity, symmetry, and so on. The RTOSs provide basic services for multitasking applications with deterministic behavior on MCUs. The services provided by the RTOSs are task management and inter-task synchronization and communication. The selection of the RTOS is very important in the development of the embedded system with real-time requirements and it must be based on the latency in the handling of the critical operations triggered by internal or external events, predictability/determinism in the execution of the RTOS primitives, license costs, and memory footprint. In this paper, we measured and compared the timing performance for synchronization throughout an event, semaphore, and mailbox for the following RTOSs: FreeRTOS 9.0.0, FreeRTOS 10.2.0, rt-thread, Keil RTX, uC/OS-II, and uC/OS-III. For the experimental tests, we developed test applications for two MCUs: ARM Cortex™-M4 and ARM Cortex™-M0+ based MCUs.

A Short Review of Security-Aware Techniques in Real-Time Embedded Systems

2018 ◽  
Vol 28 (02) ◽  
pp. 1930002 ◽  
Author(s):  
Hongxia Chai ◽  
Gongxuan Zhang ◽  
Junlong Zhou ◽  
Jin Sun ◽  
Longxia Huang ◽  
...  
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Real Time ◽  
Rapid Development ◽  
Short Review ◽  
Cyber Attacks ◽  
Energy Aware ◽  
Security Issues ◽  
Wide Range ◽  
Technical Theory

With the rapid development of embedded systems, users and services have been greatly facilitated while also experiencing security threats as a result of cyber-attacks and system vulnerabilities. Currently, the real-time embedded system (RTES) focus is to deal with these security issues. In this paper, we introduce a short review of security-aware techniques for RTES. We mainly discuss two common approaches to improve the security of RTESs. The first approach is achieved by exploring specific attacks. The second approach is realized by deploying security-guaranteed services. However, improving the security of embedded systems may cause excessive energy consumption at the same time. Therefore, we investigate the secure and energy-aware RTESs on a wide range of research. In addition, we study a number of common applications used in secure RETSs. This paper stands for providing awareness and better understanding of the current RTES research status as well as technical theory behind it. Hence, the RTES security issues are resolved.

Real-time signal processing in field programmable gate array based digital gamma-ray spectrometer

2020 ◽  
Vol 91 (10) ◽  
pp. 104707
Author(s):  
Yinyu Liu ◽  
Hao Xiong ◽  
Chunhui Dong ◽  
Chaoyang Zhao ◽  
Quanfeng Zhou ◽  
...  
Keyword(s):  
Signal Processing ◽  
Real Time ◽  
Field Programmable Gate Array ◽  
Gamma Ray ◽  
Time Signal ◽  
Gamma Ray Spectrometer ◽  
Field Programmable ◽  
Gate Array ◽  
Real Time Signal Processing

scholarly journals A Novel Rail-Network Hardware Simulator for Embedded System Programming

Electronics ◽  
2020 ◽  
Vol 10 (1) ◽  
pp. 13
Author(s):  
Balaji M ◽  
Chandrasekaran M ◽  
Vaithiyanathan Dhandapani
Keyword(s):  
Embedded Systems ◽  
Embedded System ◽  
Real Time ◽  
Learning Outcomes ◽  
Real World ◽  
Time Constraints ◽  
Network Simulator ◽  
Practical Applications ◽  
Rail Network ◽  
Knowledge Enhancement

A Novel Rail-Network Hardware with simulation facilities is presented in this paper. The hardware is designed to facilitate the learning of application-oriented, logical, real-time programming in an embedded system environment. The platform enables the creation of multiple unique programming scenarios with variability in complexity without any hardware changes. Prior experimental hardware comes with static programming facilities that focus the students’ learning on hardware features and programming basics, leaving them ill-equipped to take up practical applications with more real-time constraints. This hardware complements and completes their learning to help them program real-world embedded systems. The hardware uses LEDs to simulate the movement of trains in a network. The network has train stations, intersections and parking slots where the train movements can be controlled by using a 16-bit Renesas RL78/G13 microcontroller. Additionally, simulating facilities are provided to enable the students to navigate the trains by manual controls using switches and indicators. This helps them get an easy understanding of train navigation functions before taking up programming. The students start with simple tasks and gradually progress to more complicated ones with real-time constraints, on their own. During training, students’ learning outcomes are evaluated by obtaining their feedback and conducting a test at the end to measure their knowledge acquisition during the training. Students’ Knowledge Enhancement Index is originated to measure the knowledge acquired by the students. It is observed that 87% of students have successfully enhanced their knowledge undergoing training with this rail-network simulator.

scholarly journals A Generalization Performance Study Using Deep Learning Networks in Embedded Systems

Sensors ◽  
2021 ◽  
Vol 21 (4) ◽  
pp. 1031
Author(s):  
Joseba Gorospe ◽  
Rubén Mulero ◽  
Olatz Arbelaitz ◽  
Javier Muguerza ◽  
Miguel Ángel Antón
Keyword(s):  
Deep Learning ◽  
Embedded Systems ◽  
Embedded System ◽  
General Purpose ◽  
Learning Networks ◽  
Performance Study ◽  
Learning Techniques ◽  
Wide Range ◽  
Learning Architectures

Deep learning techniques are being increasingly used in the scientific community as a consequence of the high computational capacity of current systems and the increase in the amount of data available as a result of the digitalisation of society in general and the industrial world in particular. In addition, the immersion of the field of edge computing, which focuses on integrating artificial intelligence as close as possible to the client, makes it possible to implement systems that act in real time without the need to transfer all of the data to centralised servers. The combination of these two concepts can lead to systems with the capacity to make correct decisions and act based on them immediately and in situ. Despite this, the low capacity of embedded systems greatly hinders this integration, so the possibility of being able to integrate them into a wide range of micro-controllers can be a great advantage. This paper contributes with the generation of an environment based on Mbed OS and TensorFlow Lite to be embedded in any general purpose embedded system, allowing the introduction of deep learning architectures. The experiments herein prove that the proposed system is competitive if compared to other commercial systems.

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