scholarly journals Dual-Band, Dual-Output Power Amplifier Using Simplified Three-Port, Frequency-Dividing Matching Network

Electronics ◽  
2022 ◽  
Vol 11 (1) ◽  
pp. 144
Author(s):  
Xiaopan Chen ◽  
Yongle Wu ◽  
Weimin Wang

This study presents a dual-band power amplifier (PA) with two output ports using a simplified three-port, frequency-dividing matching network. The dual-band, dual-output PA could amplify a dual-band signal with one transistor, and the diplexer-like output matching network (OMN) divided the two bands into different output ports. A structure consisting of a λ/4 open stub and a λ/4 transmission line was applied to restrain undesired signals, which made each branch equivalent to an open circuit at another frequency. A three-stub design reduced the complexity of the OMN. Second-order harmonic impedances were tuned for better efficiency. The PA was designed with a 10-W gallium nitride high electron mobility transistor (GaN HEMT). It achieved a drain efficiency (DE) of 55.84% and 53.77%, with the corresponding output power of 40.22 and 40.77 dBm at 3.5 and 5.0 GHz, respectively. The 40%-DE bandwidths were over 200 MHz in the two bands.

2010 ◽  
Vol 2 (3-4) ◽  
pp. 317-324 ◽  
Author(s):  
Paul Saad ◽  
Christian Fager ◽  
Hossein Mashad Nemati ◽  
Haiying Cao ◽  
Herbert Zirath ◽  
...  

This paper presents the design and implementation of an inverse class-F power amplifier (PA) using a high power gallium nitride high electron mobility transistor (GaN HEMT). For a 3.5 GHz continuous wave signal, the measurement results show state-of-the-art power-added efficiency (PAE) of 78%, a drain efficiency of 82%, a gain of 12 dB, and an output power of 12 W. Moreover, over a 300 MHz bandwidth, the PAE and output power are maintained at 60% and 10 W, respectively. Linearized modulated measurements using 20 MHz bandwidth long-term evolution (LTE) signal with 11.5 dB peak-to-average ratio show that −42 dBc adjacent channel power ratio (ACLR) is achieved, with an average PAE of 30%, −47 dBc ACLR with an average PAE of 40% are obtained when using a WCDMA signal with 6.6 dB peak-to-average ratio (PAR).


Author(s):  
Paolo Colantonio ◽  
Franco Giannini ◽  
Rocco Giofrè ◽  
Luca Piazzon

The aim of the present paper is to highlight the possible benefits coming from the use of the GaN high electron-mobility transistor (HEMT) technology in the Doherty power amplifier (DPA) architecture. In particular, the attention is focused on the capabilities and the relevant drawbacks of a GaN HEMT technology when designing DPAs. A deep discussion of the DPA's design guidelines is also presented through the realization of three prototypes implementing different design solutions and working at 2.14 GHz. The first example is a tuned load DPA (TL-DPA), which show an average drain efficiency of 40.7% with 3 W of saturated output power in the obtained 6 dB of output back-off. The second DPA was designed implementing a class F harmonic termination for the main device, which allows an improvement of roughly 15% in output power and efficiency behavior with respect to the TL-DPA. The last DPA was realized implementing a single output matching network for both main and auxiliary devices, which allows a relevant reduction in the size of the resulting DPA, without downgrading the overall performances.


Author(s):  
Li M. Yu ◽  
Narendra K. Aridas ◽  
Tarik A. Latef

In brief, a dual-band doherty power amplifier employing reactance compensation with gallium nitride high-electron-mobility transistor technology is discussed. This design is developed for long-term evolution (LTE) frequency operation, particularly for the application of two-way radio to improve the efficiency at the back-off point from saturation output power for selected dual frequencies in the LTE bandwidth. Measurements show that the prototype board has enhanced performance at the desired frequencies, namely a saturation output power of 40.5 dBm, and 6 dB back-off efficiencies of 43% and 47%, which exhibit a gain of approximately 10 dB at 0.8 GHz and 2.1 GHz, respectively.


Author(s):  
Dirk Schwantuschke ◽  
Peter Bruckner ◽  
Sandrine Wagner ◽  
Michael Dammann ◽  
Michael Mikulla ◽  
...  

Author(s):  
Erdin Ture ◽  
Dirk Schwantuschke ◽  
Axel Tessmann ◽  
Sandrine Wagner ◽  
Peter Bruckner ◽  
...  

Electronics ◽  
2020 ◽  
Vol 9 (10) ◽  
pp. 1588
Author(s):  
Sungjae Oh ◽  
Eunjoo Yoo ◽  
Hansik Oh ◽  
Hyungmo Koo ◽  
Jaekyung Shin ◽  
...  

In this paper, a frequency selective degeneration technique using a parallel network with a resistor and capacitor is proposed for a 6–18 GHz GaAs pseudomorphic high electron mobility transistor (pHEMT) broadband power amplifier integrated circuit (PAIC). The proposed degeneration network is applied to the source of the transistor to flatten the frequency response of the transistor in conjunction with feedback and resistor biasing circuits. An almost uniform frequency response was achieved at the wide frequency band through optimizing the values of the capacitor and resistor for the degeneration circuit. Single-section matching networks for small chip sizes were adopted for the two-stage amplifier following the flat frequency characteristics of the degenerated transistor. The proposed broadband PAIC for the 6 to 18 GHz band was fabricated using a 0.15 μm GaAs pHEMT process and had a chip size of 1.03 × 0.87 mm2. The PAIC exhibited gain of 15 dB to 17.2 dB, output power of 20.5 dBm to 22.1 dBm, and linear output power of 11.9 dBm to 13.45 dBm, which satisfies the IMD3 of −30 dBc in the 6–18 GHz band. Flatness for the gain and output power was achieved as ±1.1 dB and ±0.8 dB, respectively.


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