scholarly journals A highly efficient 3.5 GHz inverse class-F GaN HEMT power amplifier

2010 ◽  
Vol 2 (3-4) ◽  
pp. 317-324 ◽  
Author(s):  
Paul Saad ◽  
Christian Fager ◽  
Hossein Mashad Nemati ◽  
Haiying Cao ◽  
Herbert Zirath ◽  
...  

This paper presents the design and implementation of an inverse class-F power amplifier (PA) using a high power gallium nitride high electron mobility transistor (GaN HEMT). For a 3.5 GHz continuous wave signal, the measurement results show state-of-the-art power-added efficiency (PAE) of 78%, a drain efficiency of 82%, a gain of 12 dB, and an output power of 12 W. Moreover, over a 300 MHz bandwidth, the PAE and output power are maintained at 60% and 10 W, respectively. Linearized modulated measurements using 20 MHz bandwidth long-term evolution (LTE) signal with 11.5 dB peak-to-average ratio show that −42 dBc adjacent channel power ratio (ACLR) is achieved, with an average PAE of 30%, −47 dBc ACLR with an average PAE of 40% are obtained when using a WCDMA signal with 6.6 dB peak-to-average ratio (PAR).

Electronics ◽  
2020 ◽  
Vol 9 (6) ◽  
pp. 899
Author(s):  
Jihoon Kim

A broadband millimeter-wave (mmWave) power amplifier (PA) was implemented using a modified 2D distributed power combining technique. The proposed power combining was based on a single-ended dual-fed distributed combining (SEDFDC) design technique using zero-phase shifting (ZPS) transmission lines. To improve the input/output power distribution of each power cell within a wide frequency range, N/2-way power dividers/combiners were inserted into the distributed combining structure. Modified ZPS lines also simplified the combining structure and curbed phase variation according to the frequency. These modifications enabled power combining cells to increase without degrading the power bandwidth. The proposed PA was fabricated with a commercial 0.15 μm GaAs pseudo high electron-mobility transistor (pHEMT) monolithic microwave-integrated circuit (MMIC) process. It exhibited 20.3 to 24.2 dBm output power (Pout), 12.9 to 21.8 dB power gain, and 5.2% to 12.7% power-added efficiency (PAE) between 26 and 56 GHz.


Sensors ◽  
2021 ◽  
Vol 21 (5) ◽  
pp. 1608
Author(s):  
Jongyun Na ◽  
Sang-Hwa Yi ◽  
Jaekyung Shin ◽  
Hyungmo Koo ◽  
Jongseok Bae ◽  
...  

This paper proposes a class-F synchronous rectifier using an independent second harmonic tuning circuit for the power receiver of 2.4 GHz wireless power transmission systems. The synchronous rectifier can be designed by inverting the RF output port to the RF input port of the pre-designed class-F power amplifier based on time reversal duality. The design of the class-F power amplifier deploys an independent second harmonic tuning circuit in the matching networks to individually optimize the impedances of the fundamental and the second harmonic. The synchronous rectifier at the 2.4 GHz frequency is designed and implemented using a 6 W gallium nitride high electron mobility transistor (GaN HEMT). Peak RF-dc conversion efficiency of the rectifier of 69.6% is achieved with a dc output power of about 7.8 W, while the peak drain efficiency of the class-F power amplifier is 72.8%.


Micromachines ◽  
2020 ◽  
Vol 11 (4) ◽  
pp. 375
Author(s):  
Min-Pyo Lee ◽  
Seil Kim ◽  
Sung-June Hong ◽  
Dong-Wook Kim

In this paper, we demonstrate a compact 20-W GaN internally matched power amplifier for 2.5 to 6 GHz jammer systems which uses a high dielectric constant substrate, single-layer capacitors, and shunt/series resistors for low-Q matching and low-frequency stabilization. A GaN high-electron-mobility transistor (HEMT) CGH60030D bare die from Wolfspeed was used as an active device, and input/output matching circuits were implemented on two different substrates using a thin-film process, relative dielectric constants of which were 9.8 and 40, respectively. A series resistor of 2.1 Ω was chosen to minimize the high-frequency loss and obtain a flat gain response. For the output matching circuit, double λ/4 shorted stubs were used to supply the drain current and reduce the output impedance variation of the transistor between the low-frequency and high-frequency regions, which also made wideband matching feasible. Single-layer capacitors effectively helped reduce the size of the matching circuit. The fabricated GaN internally matched power amplifier showed a linear gain of about 10.2 dB, and had an output power of 43.3–43.9 dBm (21.4–24.5 W), a power-added efficiency of 33.4–49.7% and a power gain of 6.2–8.3 dB at the continuous-wave output power condition, from 2.5 to 6 GHz.


Circuit World ◽  
2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Selvakumar Mariappan ◽  
Jagadheswaran Rajendran ◽  
Norlaili Mohd Noh ◽  
Yusman Yusof ◽  
Narendra Kumar

Purpose The purpose of this paper is to implement a highly linear 180 nm complementary metal oxide semiconductor (CMOS) power amplifier (PA) to meet the stringent linearity requirement of an long term evolution (LTE) signal with minimum trade-off to power added efficiency (PAE). Design/methodology/approach The CMOS PA is designed in a cascaded dual-stage configuration comprises a driver amplifier and a main PA. The gate voltage (VGS) of the driver amplifier is tuned to optimize its positive third-order transconductance (gm3) to be canceled with the main PA’s fixed negative gm3. The gm3 cancellation between these stages mitigates the third-order intermodulation product (IMD3) that contributes to enhanced linearity. Findings For driver’s VGS of 0.82 V with continuous wave signal, the proposed PA achieved a power gain of 14.5 dB with a peak PAE of 31.8% and a saturated output power of 23.3 dBm at 2.45 GHz. A maximum third-order output intercept point of 34 dBm is achieved at 20.2 dBm output power with a corresponding IMD3 of −33.4 dBc. When tested with a 20 MHz LTE signal, the PA delivers 19 dBm maximum linear output power for an adjacent channel leakage ratio specification of −30 dBc. Originality/value In this study, a novel cascaded gm3 cancellation technique has been implemented to achieve a maximum linear output power under modulated signals.


Author(s):  
Paolo Colantonio ◽  
Franco Giannini ◽  
Rocco Giofrè ◽  
Luca Piazzon

The aim of the present paper is to highlight the possible benefits coming from the use of the GaN high electron-mobility transistor (HEMT) technology in the Doherty power amplifier (DPA) architecture. In particular, the attention is focused on the capabilities and the relevant drawbacks of a GaN HEMT technology when designing DPAs. A deep discussion of the DPA's design guidelines is also presented through the realization of three prototypes implementing different design solutions and working at 2.14 GHz. The first example is a tuned load DPA (TL-DPA), which show an average drain efficiency of 40.7% with 3 W of saturated output power in the obtained 6 dB of output back-off. The second DPA was designed implementing a class F harmonic termination for the main device, which allows an improvement of roughly 15% in output power and efficiency behavior with respect to the TL-DPA. The last DPA was realized implementing a single output matching network for both main and auxiliary devices, which allows a relevant reduction in the size of the resulting DPA, without downgrading the overall performances.


Electronics ◽  
2022 ◽  
Vol 11 (1) ◽  
pp. 144
Author(s):  
Xiaopan Chen ◽  
Yongle Wu ◽  
Weimin Wang

This study presents a dual-band power amplifier (PA) with two output ports using a simplified three-port, frequency-dividing matching network. The dual-band, dual-output PA could amplify a dual-band signal with one transistor, and the diplexer-like output matching network (OMN) divided the two bands into different output ports. A structure consisting of a λ/4 open stub and a λ/4 transmission line was applied to restrain undesired signals, which made each branch equivalent to an open circuit at another frequency. A three-stub design reduced the complexity of the OMN. Second-order harmonic impedances were tuned for better efficiency. The PA was designed with a 10-W gallium nitride high electron mobility transistor (GaN HEMT). It achieved a drain efficiency (DE) of 55.84% and 53.77%, with the corresponding output power of 40.22 and 40.77 dBm at 3.5 and 5.0 GHz, respectively. The 40%-DE bandwidths were over 200 MHz in the two bands.


2021 ◽  
Vol 11 (19) ◽  
pp. 9017
Author(s):  
Jinho Jeong ◽  
Yeongmin Jang ◽  
Jongyoun Kim ◽  
Sosu Kim ◽  
Wansik Kim

In this paper, a high-power amplifier integrated circuit (IC) in gallium-nitride (GaN) on silicon (Si) technology is presented at a W-band (75–110 GHz). In order to mitigate the losses caused by relatively high loss tangent of Si substrate compared to silicon carbide (SiC), low-impedance microstrip lines (20–30 Ω) are adopted in the impedance matching networks. They allow for the impedance transformation between 50 Ω and very low impedances of the wide-gate transistors used for high power generation. Each stage is matched to produce enough power to drive the next stage. A Lange coupler is employed to combine two three-stage common source amplifiers, providing high output power and good input/output return loss. The designed power amplifier IC was fabricated in the commercially available 60 nm GaN-on-Si high electron mobility transistor (HEMT) foundry. From on-wafer probe measurements, it exhibits the output power higher than 26.5 dBm and power added efficiency (PAE) higher than 8.5% from 88 to 93 GHz with a large-signal gain > 10.5 dB. Peak output power is measured to be 28.9 dBm with a PAE of 13.3% and a gain of 9.9 dB at 90 GHz, which corresponds to the power density of 1.94 W/mm. To the best of the authors’ knowledge, this result belongs to the highest output power and power density among the reported power amplifier ICs in GaN-on-Si HEMT technologies operating at the W-band.


2012 ◽  
Vol 263-266 ◽  
pp. 39-42 ◽  
Author(s):  
Zhi Qun Cheng ◽  
Li Wei Jin ◽  
Wen Shi

A broadband power amplifier module based on GaN HEMT operating Ku band is designed. TGF2023-02 Chip of GaN HEMT from TriQuint is modeled first. And then the module consists of two stages amplifiers. The first stage amplifier is single-stage amplifier and the second is two-way combiner amplifier. Wilkinson power divider, DC bias circuits and microstrip matching circuits are simulated and designed carefully. Simulation results showed that the amplifier module exhibits a power gain of 7 dB, power added efficiency of 13.9%, and an output power of 16 W under Vds=28 V, Vgs=-3.6 V, CW operating conditions at the frequency of 15 GHz.


Electronics ◽  
2020 ◽  
Vol 9 (10) ◽  
pp. 1588
Author(s):  
Sungjae Oh ◽  
Eunjoo Yoo ◽  
Hansik Oh ◽  
Hyungmo Koo ◽  
Jaekyung Shin ◽  
...  

In this paper, a frequency selective degeneration technique using a parallel network with a resistor and capacitor is proposed for a 6–18 GHz GaAs pseudomorphic high electron mobility transistor (pHEMT) broadband power amplifier integrated circuit (PAIC). The proposed degeneration network is applied to the source of the transistor to flatten the frequency response of the transistor in conjunction with feedback and resistor biasing circuits. An almost uniform frequency response was achieved at the wide frequency band through optimizing the values of the capacitor and resistor for the degeneration circuit. Single-section matching networks for small chip sizes were adopted for the two-stage amplifier following the flat frequency characteristics of the degenerated transistor. The proposed broadband PAIC for the 6 to 18 GHz band was fabricated using a 0.15 μm GaAs pHEMT process and had a chip size of 1.03 × 0.87 mm2. The PAIC exhibited gain of 15 dB to 17.2 dB, output power of 20.5 dBm to 22.1 dBm, and linear output power of 11.9 dBm to 13.45 dBm, which satisfies the IMD3 of −30 dBc in the 6–18 GHz band. Flatness for the gain and output power was achieved as ±1.1 dB and ±0.8 dB, respectively.


2020 ◽  
Vol 30.8 (147) ◽  
pp. 46-50
Author(s):  
Duy Manh Luong ◽  
◽  
Huy Hoang Nguyen

This study presents a design procedure to obtain high-efficiency for microwave power amplifier. The designed amplifier uses a GaN high electron mobility transistor as an active device. Matching networks including input and output networks are realized using Megtron6 substrate microstrip lines. The designed amplifier operates at 2.1 GHz band. The simulated results show that the amplifier delivers a maximum power-added efficiency of 73.2% at output power and power gain of 47.8 dBm and 13.8 dB, respectively. This promising designed performance makes this amplifier to be an excellent candidate for use in modern wireless communication systems like radar, mobile network, and satellite communications.


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