scholarly journals Research on the Filters for Dual-Inverter Fed Open-End Winding Transformer Topology in Photovoltaic Grid-tied Applications

Energies ◽  
2019 ◽  
Vol 12 (12) ◽  
pp. 2338 ◽  
Author(s):  
Wang ◽  
Zhang ◽  
Song ◽  
Cao
Keyword(s):  
Output Voltage ◽  
Design Method ◽  
Parameter Design ◽  
Equivalent Circuits ◽  
Harmonic Suppression ◽  
Medium Voltage ◽  
Filter Performance ◽  
Voltage Harmonics ◽  
Inverter Topology ◽  
Open End Winding

Owing to the necessity of the transformer for the multi-parallel inverters connected to the medium-voltage (MV) grid, the conventional multi-parallel inverter topology can be reconfigured to the dual-inverter fed open-end winding transformer (DI-OEWT) topology to obtain lower output voltage harmonics, which can reduce the requirement of the filter inductance. However, due to the special structure of the DI-OEWT topology, the arrangement scheme of the filter can be more than one kind, and different schemes may affect the filter performance. In this paper, research on the existing two kinds of filters, as well as a proposed one, for the DI-OEWT topology used in photovoltaic grid-tied applications is presented. The equivalent circuits of these filters are derived, and based on this, the harmonic suppression capability of these filters is analyzed and compared. Furthermore, a brief parameter design method of these filters is also introduced, and based on the design examples, the inductance and capacitance requirements of these filters are compared. In addition, these filters are also evaluated in terms of the applicability for fault tolerance. At last, the analysis is verified through an experiment on a 30 kW dual-three-level inverter prototype.

A New Asymmetric and Cascaded Switched Diode Multilevel Inverter Topology for Reduced Switches, DC Source and Blocked Voltage on Switches

2019 ◽  
Vol 28 (04) ◽  
pp. 1950064 ◽  
Author(s):  
S. A. Ahamed Ibrahim ◽  
P. Anbalagan ◽  
M. A. Jagabar Sathik
Keyword(s):  
High Power ◽  
Output Voltage ◽  
Multilevel Inverter ◽  
Basic Unit ◽  
Prototype Model ◽  
Multilevel Converter ◽  
Multilevel Converters ◽  
Medium Voltage ◽  
Blocking Voltage ◽  
Inverter Topology

In this paper, a new asymmetric switched diode (ASD) multilevel inverter is presented for medium-voltage and high-power applications. The proposed converter consists of series connection basic unit with full-bridge inverter. In addition to this, a cascaded switched diode (CSD) structure is recommended to generate the higher number of voltage levels. Seven different algorithms are presented to determine the magnitudes of DC sources in CSD topology. To prove the advantages of proposed multilevel converter over recent multilevel converters in terms of blocking voltage, numbers of IGBTs and on-state switches are presented. To show the authority of the proposed multilevel inverter, it is simulated using MATLAB/Simulink and is experimentally tested using prototype model for 13-level inverter. Finally, various output voltage and current waveforms are shown to prove the dynamic behavior of proposed inverter.

scholarly journals Parameters Design and Optimization of a High Frequency, Interleaved, Dual-Buck, Bidirectional, Grid-Connected Converter

Electronics ◽  
2019 ◽  
Vol 8 (9) ◽  
pp. 973
Author(s):  
Yulu Cui ◽  
Yifeng Wang ◽  
Xiaoyong Ma
Keyword(s):  
Power Density ◽  
High Frequency ◽  
Design Method ◽  
Parameter Design ◽  
Switching Frequency ◽  
Filter Parameter ◽  
Design And Optimization ◽  
Filter Performance ◽  
Performance Indexes ◽  
The Relationship

In this paper, a high frequency, interleaved, dual-buck, bidirectional, grid-connected converter topology is proposed. Free from the straight-through and dead-time distortion issues, both higher switching frequency and power density can be achieved. Due to the interleaved technique, the current ripple and stress for inductors and other power devices can be effectively reduced. Moreover, a novel filter parameter design method is proposed. The method is optimized with smaller inductance, higher filtering performance, and better steady-state performance. For one thing, the performance requirements under the two states of inverter and rectifier are comprehensively considered. For another, the relationship between the performance indexes and the filter parameters is analyzed. However, the results show that the relationship between the performance indexes is contradictory. A set of optimization parameters were obtained by setting the priority of the filter performance index. The specific design process of the filter parameters is given in detail. In order to verify the rationality of the parameter design, a 5 kW prototype was built and tested. The total harmonic distortions (THDs) of the grid currents in the among grid-connected inverter, off-connected inverter, and rectifier states under full load were 2.7%, 1.2%, and 4.5%, respectively, and the power density reached 36 W/in3.

scholarly journals Analysis of series/parallel multilevel inverter with symmetrical and asymmetrical configurations

2019 ◽  
Vol 10 (1) ◽  
pp. 300
Author(s):  
Motaparthi Nagaraju ◽  
Malligunta Kiran Kumar
Keyword(s):  
Renewable Energy ◽  
Output Voltage ◽  
Renewable Energy Sources ◽  
Multilevel Inverter ◽  
Energy Sources ◽  
Major Drawback ◽  
Medium Voltage ◽  
Bridge Type ◽  
Result Analysis ◽  
Inverter Topology

<p>Usage of high power and medium voltage applications in domestic and industrial purpose has been increased in the recent years. Also, the penetration of renewable energy sources is increasing rapidly. To make use the renewable energy sources there is a need of using inverters. The basic inverter is conventional two level inverter which produces the square wave output voltage. The major drawback of conventional inverter is it contains more harmonics. Therefore, multilevel inverters have been introduced with staircase output voltage waveform. Lot of multilevel inverter topologies have been developed and cascaded H bridge type is the more frequently used. But, it requires more number of switches for higher output voltage level. In this paper, a novel 7 level asymmetrical multilevel inverter topology is proposed with less number of switches. This proposed topology is compared with already existing topology. The simulation of circuit and result analysis of the circuit is carried out by using Matlab/simulink software. The comparison between existing topology and proposed topology is given. The results are discussed and presented.</p>

Comparison of the Acoustic Noise caused by Output Voltage Harmonics on Three-Phase Voltage-Fed Inverters

2019 ◽  
Vol 139 (11) ◽  
pp. 901-907
Author(s):  
Jumpei Sawada ◽  
Shin-ichi Motegi ◽  
Yoshitaka Nakamura ◽  
Masaki Yamada
Keyword(s):  
Output Voltage ◽  
Acoustic Noise ◽  
Phase Voltage ◽  
Three Phase ◽  
Voltage Harmonics

scholarly journals A Control Parameter Design Method for Hybrid Multi-Terminal HVDC System

IEEE Access ◽  
2020 ◽  
Vol 8 ◽  
pp. 18669-18680 ◽  
Author(s):  
Bingkun Li ◽  
Yuansheng Liang ◽  
Gang Wang ◽  
Haifeng Li ◽  
Xinquan Chen
Keyword(s):  
Control Parameter ◽  
Design Method ◽  
Parameter Design ◽  
Hvdc System
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