scholarly journals Real-Time Hardware in the Loop Simulation Methodology for Power Converters Using LabVIEW FPGA

Energies ◽  
2020 ◽  
Vol 13 (2) ◽  
pp. 373 ◽  
Author(s):  
Leonel Estrada ◽  
Nimrod Vázquez ◽  
Joaquín Vaquero ◽  
Ángel de Castro ◽  
Jaime Arau

Nowadays, the use of the hardware in the loop (HIL) simulation has gained popularity among researchers all over the world. One of its main applications is the simulation of power electronics converters. However, the equipment designed for this purpose is difficult to acquire for some universities or research centers, so ad-hoc solutions for the implementation of HIL simulation in low-cost hardware for power electronics converters is a novel research topic. However, the information regarding implementation is written at a high technical level and in a specific language that is not easy for non-expert users to understand. In this paper, a systematic methodology using LabVIEW software (LabVIEW 2018) for HIL simulation is shown. A fast and easy implementation of power converter topologies is obtained by means of the differential equations that define each state of the power converter. Five simple steps are considered: designing the converter, modeling the converter, solving the model using a numerical method, programming an off-line simulation of the model using fixed-point representation, and implementing the solution of the model in a Field-Programmable Gate Array (FPGA). This methodology is intended for people with no experience in the use of languages as Very High-Speed Integrated Circuit Hardware Description Language (VHDL) for Real-Time Simulation (RTS) and HIL simulation. In order to prove the methodology’s effectiveness and easiness, two converters were simulated—a buck converter and a three-phase Voltage Source Inverter (VSI)—and compared with the simulation of commercial software (PSIM® v9.0) and a real power converter.

Energies ◽  
2021 ◽  
Vol 14 (8) ◽  
pp. 2092
Author(s):  
Ke Li ◽  
Paul Leonard Evans ◽  
Christopher Mark Johnson ◽  
Arnaud Videt ◽  
Nadir Idir

In order to model GaN-HEMT switching transients and determine power losses, a compact model including dynamic RDSon effect is proposed herein. The model includes mathematical equations to represent device static and capacitance-voltage characteristics, and a behavioural voltage source, which includes multiple RC units to represent different time constants for trapping and detrapping effect from 100 ns to 100 s range. All the required parameters in the model can be obtained by fitting method using a datasheet or experimental characterisation results. The model is then implemented into our developed virtual prototyping software, where the device compact model is co-simulated with a parasitic inductance physical model to obtain the switching waveform. As model order reduction is applied in our software to resolve physical model, the device switching current and voltage waveform can be obtained in the range of minutes. By comparison with experimental measurements, the model is validated to accurately represent device switching transients as well as their spectrum in frequency domain until 100 MHz. In terms of dynamic RDSon value, the mismatch between the model and experimental results is within 10% under different power converter operation conditions in terms of switching frequencies and duty cycles, so designers can use this model to accurately obtain GaN-HEMT power losses due to trapping and detrapping effects for power electronics converters.


Electronics ◽  
2020 ◽  
Vol 9 (1) ◽  
pp. 81 ◽  
Author(s):  
Alberto Sanchez ◽  
Angel de Castro ◽  
Maria Sofía Martínez-García ◽  
Javier Garrido

One of the main decisions when making a digital design is which arithmetic is going to be used. The arithmetic determines the hardware resources needed and the latency of every operation. This is especially important in real-time applications like HIL (Hardware-in-the-loop), where a real-time simulation of a plant—power converter, mechanical system, or any other complex system—is accomplished. While a fixed-point gets optimal implementations, using considerably fewer resources and allowing smaller simulation steps, its use is very restricted to very specific applications, as its design effort is quite high. On the other side, IEEE-754 floating-point may have resolution problems in case of the 32-bit version, and excessive hardware usage in case of the 64-bit version. This paper presents LOCOFloat, a low-cost floating-point format designed for FPGA applications. Its key features are soft normalization of the results, using significand and exponent fields in two’s complement. This paper shows the implementation of addition, subtraction and multiplication of the proposed format. Both IEEE-754 versions and LOCOFloat are compared in this paper, implementing a HIL model of a buck converter. Although the application example is a HIL simulator, other applications could take benefit from the proposed format. Results show that LOCOFloat is as accurate as 64-bit floating-point, while reducing the use of DSPs blocks by 84 % .


2018 ◽  
Vol 4 (2) ◽  
pp. 62-72
Author(s):  
Feng Qin ◽  
Ying Lin ◽  
Diqiang Lu

Aim: For exploring and testing the key technology of high-speed maglev transportation propulsion control system, this paper designs and establishes a hardware-in-the-loop (HIL) real-time simulation system of the high-speed maglev transportation five-segment propulsion system. Materials and methods of the studies: According to the route conditions and propulsion segment division of Shanghai maglev demonstration and operation line, the real-time simulation platform based on dSPACE multiprocessor systems is implemented. The simulation system can achieve the functional simulation of all the high-power related equipment in the 5-segment area, including 8 sets of high-power converter units, 2 sets of medium-power converter units, 2 sets of low-power converter units, five-segment trackside switch stations and long-stator linear synchronous motors. The mathematical models of linear motors and converters are built in MATLAB/Simulink and System Generator, after compiling, they can be downloaded and executed in Field Programmable Logic Array (FPGA). All the interfaces connecting the simulation system to the propulsion control system physical equipment use real physical components as in the field, such as analog I/O, digital I/O, optical signals and Profibus. Results: By using CPU+FPGA hardware configuration, the simulation steps are greatly shortened and the response speed and accuracy of real-time simulation system are improved. The simulation system can simulate multiple operating modes such as multi-segment, multi-vehicle, double-track, double-feeding, step-by-step stator section changeover, and so on. The simulation results show that the maximum speed of the simulation system can reach 500 km/h. Conclusion: This HIL system can provide detailed real-time on-line test and verification of high speed maglev propulsion control system.


2011 ◽  
Vol 57 (1) ◽  
pp. 77-83 ◽  
Author(s):  
Konrad Skup ◽  
Paweł Grudziński ◽  
Piotr Orleański

Application of Digital Control Techniques for Satellite Medium Power DC-DC Converters The objective of this paper is to present a work concerning a digital control loop system for satellite medium power DC-DC converters that is done in Space Research Centre. The whole control process of a described power converter is based on a high speed digital signal processing. The paper presents a development of a FPGA digital controller for voltage and current mode stabilization that was implemented using VHDL. The described controllers are based on a classical digital PID controller. The converter used for testing is a 200 kHz, 750W buck converter with 50V/15A output. A high resolution digital PWM approach is presented. Additionally a simple and effective solution of filtering of an analog-to-digital converter output is presented.


2019 ◽  
Vol 6 (5) ◽  
pp. 7375-7385 ◽  
Author(s):  
Mohammadreza Baharani ◽  
Mehrdad Biglarbegian ◽  
Babak Parkhideh ◽  
Hamed Tabkhi

Author(s):  
Seung Tae Cha ◽  
Qiuwei Wu ◽  
Arne Hejde Nielsen ◽  
Jacob Østergaard ◽  
In Kwon Park

Author(s):  
Ali Ahmed Adam Ismail ◽  
A. Elnady

<span lang="EN-US">In this paper, a non-isolated multi-level DC-DC (MLDC-DC) smooth buck converter with the LC filter is designed and analyzed. The presented topology can be used in low or medium voltage levels in several applications that use DC storage elements. The use of the proposed multilevel converter topology reduces the voltage stress across the power converter switching elements and facilitates the voltage rating of the switches. The designed LC filter for the multilevel converter is characterized by a small inductor size, which reduces the traditional bulky inductor used in the output of the traditional DC-DC converter. The reduction in the filter size is proportional to the number of the connected voltage sources, it works effectively to reduce ripple in the load currents, and it increases the voltage gain. The intensive analysis of the converter system and the experimental results show a stable operation of the proposed converter with precise output voltage.</span>


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