scholarly journals Memristive and CMOS Devices for Neuromorphic Computing

Materials ◽  
2020 ◽  
Vol 13 (1) ◽  
pp. 166 ◽  
Author(s):  
Valerio Milo ◽  
Gerardo Malavena ◽  
Christian Monzio Compagnoni ◽  
Daniele Ielmini
Keyword(s):  
Neural Network ◽  
Neural Networks ◽  
Low Power ◽  
Complementary Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Neuromorphic Computing ◽  
Ultra Low Power ◽  
Von Neumann ◽  
Novel Device ◽  
Von Neumann Architecture

Neuromorphic computing has emerged as one of the most promising paradigms to overcome the limitations of von Neumann architecture of conventional digital processors. The aim of neuromorphic computing is to faithfully reproduce the computing processes in the human brain, thus paralleling its outstanding energy efficiency and compactness. Toward this goal, however, some major challenges have to be faced. Since the brain processes information by high-density neural networks with ultra-low power consumption, novel device concepts combining high scalability, low-power operation, and advanced computing functionality must be developed. This work provides an overview of the most promising device concepts in neuromorphic computing including complementary metal-oxide semiconductor (CMOS) and memristive technologies. First, the physics and operation of CMOS-based floating-gate memory devices in artificial neural networks will be addressed. Then, several memristive concepts will be reviewed and discussed for applications in deep neural network and spiking neural network architectures. Finally, the main technology challenges and perspectives of neuromorphic computing will be discussed.

scholarly journals Adiabatic superconducting cells for ultra-low-power artificial neural networks

2016 ◽  
Vol 7 ◽  
pp. 1397-1403 ◽  
Author(s):  
Andrey E Schegolev ◽  
Nikolay V Klenov ◽  
Igor I Soloviev ◽  
Maxim V Tereshonok
Keyword(s):  
Neural Network ◽  
Neural Networks ◽  
Artificial Neural Networks ◽  
Low Power ◽  
Power Dissipation ◽  
Radial Basis Function Networks ◽  
Activation Functions ◽  
Ultra Low Power ◽  
Network Algorithms ◽  
Low Power Dissipation

We propose the concept of using superconducting quantum interferometers for the implementation of neural network algorithms with extremely low power dissipation. These adiabatic elements are Josephson cells with sigmoid- and Gaussian-like activation functions. We optimize their parameters for application in three-layer perceptron and radial basis function networks.

scholarly journals Ultra-Low Power Hand Gesture Sensor Using Electrostatic Induction

Sensors ◽  
2021 ◽  
Vol 21 (24) ◽  
pp. 8268
Author(s):  
Hiroshi Fuketa
Keyword(s):  
Low Power ◽  
Gesture Recognition ◽  
Complementary Metal Oxide Semiconductor ◽  
Hand Gesture Recognition ◽  
Oxide Semiconductor ◽  
Hand Movements ◽  
Hand Gesture ◽  
Cmos Process ◽  
Ultra Low Power ◽  
Electrostatic Induction

This paper presents an ultra-low power hand gesture sensor using electrostatic induction for mobile devices. Two electrodes, which consist of electret foils stacked on metal sheets, are used to recognize two gestures such as hand movements from left to right and right to left. The hand gesture recognition is realized by detecting the electrostatic induction currents induced by hand movements. However, the electrostatic induction currents are significantly small; hence, a hand gesture recognition chip is first designed in this study to amplify and detect the small electrostatic induction currents with low power. This chip is fabricated in a commercial 180 nm complementary metal oxide semiconductor (CMOS) process, and the measurement results indicate that the fabricated gesture recognition chip consumes 406 nW, which is less than 1/100th of the power dissipation of conventional gesture sensors.

scholarly journals Modeling and Simulation of Asynchrony in Neuromorphic Computing

2019 ◽  
Vol 8 (9) ◽  
pp. 676-685
Keyword(s):  
Neural Network ◽  
Human Brain ◽  
Hardware Implementation ◽  
Electronic System ◽  
Clock Generator ◽  
Asynchronous Circuit ◽  
Neuromorphic Computing ◽  
Von Neumann ◽  
Von Neumann Architecture ◽  
Computational Element

Neuromorphic computing is a non-von Neumann architecture which is also referred to as artificial neural network and that allows electronic system to function in the same manner as that of the human brain. In this paper we have developed neural core architecture analogous to that of the human brain. Each neural core has its own computational element neuron, memory to store information and local clock generator for synchronous functioning of neuron along with asynchronous input-output port and its port controller. The neuron model used here is a tailor-made of IBM TrueNorth’s neuron block. Our design methodology includes both synchronous and asynchronous circuit in order to build an event-driven neural network core. We have first simulated our design using Neuroph studio in order to calculate the weights and bias value and then used these weights for hardware implementation. With that we have successfully demonstrated the working of neural core using XOR application. It was designed in VHDL language and simulated in Xilinx ISE software.

HPM: High-Precision Modeling of a Low-Power Inverter-Based Memristive Neural Network

2021 ◽  
pp. 2150274
Author(s):  
Negin Mohajeri ◽  
Behzad Ebrahimi ◽  
Massoud Dousti
Keyword(s):  
Neural Network ◽  
Neural Networks ◽  
High Precision ◽  
Complementary Metal Oxide Semiconductor ◽  
Process Variations ◽  
Oxide Semiconductor ◽  
Ex Situ ◽  
Training Phase ◽  
Cmos Inverter ◽  
Memristive Neural Network

In this paper, we propose a high-precision memristive neural network with neurons implemented by complementary metal oxide semiconductor (CMOS) inverters. Regarding the process variations in the memristors and the sensitivity of the memristive crossbar structure to these fluctuations, the read operation with repetitive pulses and feedback-based write in the memristors are used to implement the neural networks trained by the ex-situ method. Moreover, accurate modeling of the neuron circuit (CMOS inverter) and decreasing the mismatch between trained weights and the limited memristances fill the gap between simulation and implementation. To employ physical constraints based on the memristor framework during the training phase, a linear function is utilized to map the trained weights to the acceptable range of memristances after the training phase. To solve the vanishing gradient problem due to the use of the tanh function as an activation function and for better learning of the network, some measures are taken. Moreover, fin field-effect transistor (FinFET) technology is used to prevent the reduction of the accuracy of the inverter-based memristive neural networks due to the process variations. Overall, our implementation improves the speed, area, power-delay product (PDP), and mean square error (MSE) of the training stage by 91.43%, 95.06%, 48.29% and 81.64%, respectively.

scholarly journals A Neural Network Decomposition Algorithm for Mapping on Crossbar-Based Computing Systems

Electronics ◽  
2020 ◽  
Vol 9 (9) ◽  
pp. 1526 ◽  
Author(s):  
Choongmin Kim ◽  
Jacob A. Abraham ◽  
Woochul Kang ◽  
Jaeyong Chung
Keyword(s):  
Neural Network ◽  
Neural Networks ◽  
Predictive Performance ◽  
Fixed Number ◽  
Decomposition Algorithm ◽  
Computing Systems ◽  
Network Decomposition ◽  
Von Neumann ◽  
Analog Computing ◽  
The Neural Network

Crossbar-based neuromorphic computing to accelerate neural networks is a popular alternative to conventional von Neumann computing systems. It is also referred as processing-in-memory and in-situ analog computing. The crossbars have a fixed number of synapses per neuron and it is necessary to decompose neurons to map networks onto the crossbars. This paper proposes the k-spare decomposition algorithm that can trade off the predictive performance against the neuron usage during the mapping. The proposed algorithm performs a two-level hierarchical decomposition. In the first global decomposition, it decomposes the neural network such that each crossbar has k spare neurons. These neurons are used to improve the accuracy of the partially mapped network in the subsequent local decomposition. Our experimental results using modern convolutional neural networks show that the proposed method can improve the accuracy substantially within about 10% extra neurons.

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