scholarly journals Effect of Buffer Layer Capacitance on the Electrical Characteristics of Ferroelectric Polymer Capacitors and Field Effect Transistors

Materials ◽  
2021 ◽  
Vol 14 (5) ◽  
pp. 1276
Author(s):  
Eun-Kyung Noh ◽  
Amos Boampong ◽  
Yu Konno ◽  
Yuji Shibasaki ◽  
Jae-Hyun Lee ◽  
...  

We demonstrated the effect of a buffer layer on the electrical characteristics of ferroelectric polymer capacitors and field-effect transistors. Various polymer materials with a dielectric constant between 2 and 42 were used to form buffer layers with a similar thicknesses, but with different capacitances. In order to evaluate the characteristics of the ferroelectrics with a buffer layer, the polarization–voltage characteristics of the capacitor, the transfer characteristics, and the retention characteristics of the transistors were investigated. As the capacitance of the buffer layer increased, high remnant polarization (Pr), high hysteresis, and long retention times were observed. Exceptionally, when poly(methylmethacrylate) and rigid poly(aryl ether) (poly(9,9-bis(4-hydroxyphenyl)fluorene-co-decafluorobiphenyl)) were used as the buffer layer, Pr had a value close to 0 in the dynamic measurement polarization–voltage (P–V) characteristic, but the quasi-static measurement transfer characteristic and the static measurement retention characteristic showed relatively high hysteresis and long retention times. Our study provides a scientific and technical basis for the design of ferroelectric memory and neuromorphic devices.

1995 ◽  
Vol 379 ◽  
Author(s):  
Jeffrey J. Welser

ABSTRACTThe experimental application of strained-Si / relaxed-Si1−xGex heterostructures to n-MOSFETs is discussed, focusing on the enhanced mobility provided by the strain. This paper provides an overview of the theoretically-predicted electronic properties of these heterostructures, as well as their growth. Several practical issues which arise in MOS applications are covered, including the effect of the relaxed-Si1−xGex, buffer layers on diode performance, and the observation of self-heating effects in the output characteristics of the MOS transistors.


2015 ◽  
Vol 51 (28) ◽  
pp. 6130-6132 ◽  
Author(s):  
Lyubov A. Frolova ◽  
Pavel A. Troshin ◽  
Diana K. Susarova ◽  
Alexander V. Kulikov ◽  
Nataliya A. Sanina ◽  
...  

Memory devices with superior electrical characteristics were designed using an interfacial spirooxazine layer introduced between dielectric and semiconductor layers in OFETs.


2014 ◽  
Vol 16 (22) ◽  
pp. 10861-10865 ◽  
Author(s):  
Jia Gao ◽  
Yueh-Lin Loo

Presorted, semiconducting carbon nanotubes in the channels of field-effect transistors undergo simultaneous p-doping and oxidation during ozone exposure.


2011 ◽  
Vol 20 (1) ◽  
pp. 017304 ◽  
Author(s):  
Xiao-Chuan Deng ◽  
Bo Zhang ◽  
You-Run Zhang ◽  
Yi Wang ◽  
Zhao-Ji Li

2021 ◽  
Vol 21 (8) ◽  
pp. 4330-4335
Author(s):  
Jaemin Son ◽  
Doohyeok Lim ◽  
Sangsig Kim

In this study, we examine the electrical characteristics of p+–n+–i–n+ silicon-nanowire field-effect transistors with partially gated channels. The silicon-nanowire field-effect transistors operate with barrier height modulation through positive feedback loops of charge carriers triggered by impact ionization. Our field-effect transistors exhibit outstanding switching characteristics, with an on current of ˜10−4 A, an on/off current ratio of ˜106, and a point subthreshold swing of ˜23 mV/dec. Moreover, the devices inhibit ambipolar characteristics because of the use of the partially gated structure and feature the p-channel operation mode.


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