scholarly journals Design and Analysis of a Reconfigurable Gilbert Mixer for Software-Defined Radios

Sensors ◽  
2021 ◽  
Vol 21 (8) ◽  
pp. 2711
Author(s):  
Shilpa Mehta ◽  
Xue-Jun Li ◽  
Massimo Donelli
Keyword(s):  
Software Defined Radio ◽  
Return Loss ◽  
Scientific Literature ◽  
Noise Figure ◽  
Tunable Filter ◽  
Image Rejection ◽  
Third Order ◽  
Rejection Ratio ◽  
Image Rejection Ratio ◽  
Intercept Point

A reconfigurable gm-boosted, image-rejected downconversion mixer is presented in this paper using the SiGe 8 HP technology. The proposed mixer operates within 0.9–13.5 GHz that is suitable for software-defined radio applications. The conversion mixer comprises of resistive biased radio frequency (RF) section, double balanced Gilbert cell mixer core sections divided as per I and Q stages for image-rejection purpose, inductively peaked gm-boosting section and tunable filter section, respectively. In comparison to previous works in the scientific literature, the design shows enhanced conversion gain (CG), noise figure (NF), and image-rejection ratio (IRR). For the entire band of operation, the mixer attains a good return loss |S11| of <−10 dB. Additionally, the design accomplishes an excellent CG of 22 dB, NF of 2.5 dB, and an image-rejection ratio of 30.2 dB at maximum frequency. Finally, a third-order intercept point (IP3) of −3.28 dBm and 1 dB compression point (CP1) of −13 dBm, respectively, shows moderate linearity performance.

scholarly journals A 24-GHz RF Transmitter in 65-nm CMOS for In-Cabin Radar Applications

Electronics ◽  
2020 ◽  
Vol 9 (12) ◽  
pp. 2005
Author(s):  
Suyeon Lee ◽  
Yangji Jeon ◽  
Geonwoo Park ◽  
Jinman Myung ◽  
Seungjik Lee ◽  
...  
Keyword(s):  
Direct Conversion ◽  
Cmos Process ◽  
Image Rejection ◽  
Third Order ◽  
Rejection Ratio ◽  
Rf Transmitter ◽  
Phase Filter ◽  
Radar Applications ◽  
Image Rejection Ratio ◽  
24 Ghz

A 24-GHz direct-conversion transmitter is proposed for in-cabin radar applications. The proposed RF transmitter consists of an I/Q up-conversion mixer, an I/Q local (LO) oscillator generator, and a power amplifier. To improve the linearity of the I/Q up-conversion mixer, an inverter transconductor with third-order intermodulation (IM3) distortion cancellation is proposed. To improve the I/Q balancing performance of the I/Q LO generator, a poly-phase filter, including parasitic line inductance, is proposed. By employing a highly linear I/Q up-conversion mixer and a balanced I/Q LO generator, the 24-GHz direct-conversion transmitter achieves high linearity and I/Q balancing characteristics. It is fabricated in a 65-nm CMOS process and consumes 150 mW. It shows an OP1dB of 8.6 dBm, an LO leakage of −48 dBc, and an image rejection ratio of −49 dBc for the entire operating band from 24 GHz to 24.5 GHz.

Pass-Band Gain Improvement Technique for Passive RC Polyphase Filter in Bluetooth Low-IF Receiver Using Two RC Band-Stop Filters

2020 ◽  
Vol 38 ◽  
pp. 192-205
Author(s):  
Minh Tri Tran ◽  
Nene Kushita ◽  
Anna Kuwana ◽  
Haruo Kobayashi
Keyword(s):  
Superposition Principle ◽  
Local Maximum ◽  
Pass Band ◽  
Image Rejection ◽  
Polyphase Filter ◽  
Rejection Ratio ◽  
Input Signals ◽  
Low If Receiver ◽  
Image Rejection Ratio ◽  
Positive Frequency

This paper proposes a method to design a flat pass-band gain with two RC band-stop filters for a 4-stage passive RC polyphase filter in a Bluetooth receiver. Based on the superposition principle, the transfer function of the poplyphase filter is derived. However, the pass-band gain of this filter is not flat on the positive frequency domain. There are two local maximum values when the input signals are the wanted signals. Therefore, two RC band-stop filters are used to improve the pass-band gain of these local maximum values. As a result, a flat pass-band gain passive RC poly-phase filter is designed for a Bluetooth low-IF receiver which image rejection ratio is-36dB, and ripple gain is 0.47dB.

A Highly-Integrated, Switchless and Baluns-Embedded Transceiver with a Differential Structure for C-Band Radar Application

2019 ◽  
Vol 29 (10) ◽  
pp. 2050160
Author(s):  
Guoxiao Cheng ◽  
Zhiqun Li ◽  
Zhennan Li ◽  
Zengqi Wang ◽  
Meng Zhang
Keyword(s):  
Output Power ◽  
Noise Figure ◽  
Low Noise ◽  
Cmos Process ◽  
Image Rejection ◽  
Rf Switch ◽  
Differential Structure ◽  
Noise Amplifier ◽  
Image Rejection Ratio ◽  
Better Than

This paper presents a highly-integrated transceiver with a differential structure for C-band (5–6[Formula: see text]GHz) radar application using a switchless and baluns-embedded configuration. To reduce the noise figure (NF) in receiver (Rx) mode and enhance the output power in transmitter (Tx) mode, the balun at RF port is embedded into the low-noise amplifier (LNA) and the power amplifier (PA), respectively. Besides, the RF switch is removed by designing the matching networks that both LNA and PA can share. The same topology is also adopted at the IF port. To achieve a high image rejection ratio (IRR), a Hartley architecture using polyphase filters (PPFs) is adopted. The proposed transceiver has been implemented in 1P6M 0.18-[Formula: see text]m CMOS process. The receiver achieves 6.9-dB NF, [Formula: see text]7.5-dBm IIP3 and 26.3-dB gain with three-step digital gain controllability. Also the measured IRR is better than 41[Formula: see text]dBc. The transmitter achieves 9.6-dBm output power and 19.2-dB gain. The chip consumes 106[Formula: see text]mA in the Rx mode and 141[Formula: see text]mA in the Tx mode from the 3.3-V power supply.

scholarly journals Design of the Low Noise Amplifier Circuit in Band L for Improve the Gain and Circuit Stability

2018 ◽  
Vol 1 (4) ◽  
Author(s):  
Arash Omidi ◽  
Rohalah Karami ◽  
Parisa Sadat Emadi ◽  
Hamed Moradi
Keyword(s):  
Noise Figure ◽  
Low Noise ◽  
Low Noise Amplifier ◽  
System Stability ◽  
Third Order ◽  
Cmos Transistor ◽  
Cmos Lna ◽  
Noise Amplifier ◽  
The Cost ◽  
Intercept Point

In this paper, focuses on the design of Low Noise Amplifier circuitry in the frequency band L. This circuit is designed using the 0.18 nm CMOS transistor technology, which consists of two transistor Stage. The purpose of this research is to improve the cost of: Increase Gain - Increase circuit linearization - Create an integrative matching network for system stability. The application of this circuit can be used in wireless and GPS systems. The CMOS LNA exhibits a gain greater than 23 dB from 1.1 to 2.0 GHz, and a noise figure of 2.7 to 3.3 dB from 1.2 to 2.4 GHz. At 1.575 GHz, the 1-dB compression point (P1dB) is 1.73 dBm, with an input third-order intercept point (IIP3) of -3.98 dBm. This circuit is designed using ADS software.

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