A High Bandwidth Signal Generation System Based on FPGA

2012 ◽  
Vol 198-199 ◽  
pp. 1743-1747
Author(s):  
Xu Guang Lu ◽  
Ji Hua Tian ◽  
Xiao Han ◽  
Jin Ping Sun
Keyword(s):  
Data Transfer ◽  
Synthesis Method ◽  
System Structure ◽  
Signal Generation ◽  
Test Results ◽  
Generation System ◽  
Electronic Warfare ◽  
Wideband Signal ◽  
High Bandwidth ◽  
Wave Synthesis

A Wideband Signal Generation System for radar and Electronic Warfare is presented. This system uses two DACs each can work at 1Gsps with 14-bit resolution and generate 500MHz bandwidth signal. The DDWS (Direct digital wave synthesis) method is used for signal generation and the data transfer and controlling is based on FPGA. The data for signal generation is stored in ZBT-SRAM and the system can communicate with the controller module through PC104+ interface. The system structure, implementation and test results are described in detail.

Status Report—Advanced Heat Exchanger Technology for a CCGT Power Generation System

1983 ◽  
Vol 105 (2) ◽  
pp. 348-353 ◽  
Author(s):  
D. E. Wright ◽  
L. L. Tignac
Keyword(s):  
Power Generation ◽  
Heat Exchanger ◽  
Fluidized Bed ◽  
Ceramic Materials ◽  
Department Of Energy ◽  
Test Facility ◽  
Status Report ◽  
Test Results ◽  
Generation System ◽  
Power Generation System

Rocketdyne is under contract to the Department of Energy for the development of heat exchanger technology that will allow coal to be burned for power generation and cogeneration applications. This effort involves both atmospheric fluidized bed and pulverized coal combustion systems. In addition, the heat exchanger designs cover both metallic and ceramic materials for high-temperature operations. This paper reports on the laboratory and small AFB test results completed to date. It also covers the design and installation of a 6×6 ft atmospheric fluidized bed test facility being used to correlate and expand the knowledge gained from the initial tests. The paper concludes by showing the direction this technology is taking and outlining the steps to follow in subsequent programs.

A 25 Gbps VCSEL driving ASIC: an attempt for ultra-high-speed front-end readout applications

2022 ◽  
Vol 17 (01) ◽  
pp. C01040
Author(s):  
C. Zhao ◽  
D. Guo ◽  
Q. Chen ◽  
N. Fang ◽  
Y. Gan ◽  
...  
Keyword(s):  
High Speed ◽  
Cmos Technology ◽  
Test Results ◽  
Eye Diagram ◽  
Optical Links ◽  
Optical Module ◽  
Active Feedback ◽  
High Bandwidth ◽  
Output Driver ◽  
Very High

Abstract This paper presents the design and the test results of a 25 Gbps VCSEL driving ASIC fabricated in a 55 nm CMOS technology as an attempt for the future very high-speed optical links. The VCSEL driving ASIC is composed of an input equalizer stage, a pre-driver stage and a novel output driver stage. To achieve high bandwidth, the pre-driver stage combines the inductor-shared peaking structure and the active-feedback technique. A novel output driver stage uses the pseudo differential CML driver structure and the adjustable FFE pre-emphasis technique to improve the bandwidth. This VCSEL driver has been integrated in a customized optical module with a VCSEL array. Both the electrical function and optical performance have been fully evaluated. The output optical eye diagram has passed the eye mask test at the data rate of 25 Gbps. The peak-to-peak jitter of 25 Gbps optical eye is 19.5 ps and the RMS jitter is 2.9 ps.

A New Radar Signal Processing Architecture Based on Multi-Core Processor

2014 ◽  
Vol 556-562 ◽  
pp. 1618-1621
Author(s):  
Jia Liang Fan ◽  
Qiang Yang
Keyword(s):  
Signal Processing ◽  
Pulse Compression ◽  
Adaptive Beamforming ◽  
System Structure ◽  
Radar Signal ◽  
Radar Signal Processing ◽  
Test Results ◽  
Radar Systems ◽  
Multi Core Processor ◽  
Processing Architecture

Most radar systems based on the structure that contains many DSP chips. The system structure is always complex, and it is difficult to update. Nowadays, multi-core processor develops very fast. Compared with DSP chips, multi-core processor has better performance in signal processing field. In this paper, we present a signal processing architecture which based on multi-core processor. Pulse compression algorithms and PCI-E bus are discussed as two important technologies. Adaptive beamforming test results show that multi-core processor is able to achieve radar signal processing.

scholarly journals REGION SPECIFIC WAVELET COMPRESSION FOR 4K SURVEILLANCE IMAGES

2017 ◽  
Vol 10 (13) ◽  
pp. 247
Author(s):  
Ankush Rai ◽  
Jagadeesh Kannan R
Keyword(s):  
Image Compression ◽  
Information Flow ◽  
Information Transfer ◽  
Data Transfer ◽  
Image Sequences ◽  
Successful Transmission ◽  
Specific Approach ◽  
Time Compression ◽  
High Bandwidth ◽  
Transfer Cost

For successful transmission of massively sequenced images during 4K surveillance operations large amount of data transfer cost high bandwidth, latency and delay of information transfer. Thus, there lies a need for real-time compression of this image sequences. In this study we present a region specific approach for wavelet based image compression to enable management of huge chunks of information flow by transforming Harr wavelets in hierarchical order.   

scholarly journals Ultra-Wideband Signal Generation Based on a Silicon Segmented Mach-Zehnder Modulator

2020 ◽  
Vol 12 (6) ◽  
pp. 1-15
Author(s):  
Gangqiang Zhou ◽  
Yuyao Guo ◽  
Liangjun Lu ◽  
Jianping Chen ◽  
Linjie Zhou
Keyword(s):  
Ultra Wideband ◽  
Signal Generation ◽  
Wideband Signal ◽  
Mach Zehnder Modulator
Sign in / Sign up

Export Citation Format

Share Document