Surface Micromachining of Polyureasilazane Based Ceramic-MEMS Using SU-8 Micromolds

We describe a novel surface micromachining process for the fabrication of ceramic-type MEMS devices, such as free-standing cantilevers, that is based on the use of high-aspect ratio micromolds of SU8 and aluminum as sacrificial layer. 250μm-high and 100-1000μm-wide molds were used to confine a liquid precursor of SiC/Si3N4 based ceramics on the sacrificial layer that enables the detachment of the green body before the pyrolysis step at 1000°C. The final ceramic cantilever has dimensions ranging from 100-500μm x 1-2mm x 50μm and a smooth surface. Details of the processing, structural and material characterization such as Dynamic Rheological and Thermogravimetric Analysis under UV will be presented and compared to those found in the literature.

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Application of Porous Silicon to Bulk Silicon Micromachining

MRS Proceedings ◽

10.1557/proc-459-249 ◽

1996 ◽

Vol 459 ◽

Cited By ~ 5

Author(s):

G. Kaltsas ◽

A. G. Nassiopoulos

Keyword(s):

Porous Silicon ◽

Smooth Surface ◽

Sacrificial Layer ◽

Monocrystalline Silicon ◽

Back Side ◽

Bulk Silicon ◽

Free Standing ◽

Integrated Devices ◽

Silicon Micromachining ◽

Deep Cavities

ABSTRACTA fully C-MOS compatible process for bulk silicon micromachining using porous silicon technology and front-side lithography is developed. The process is based on the use of porous silicon as a sacrificial layer for the fabrication of deep cavities into monocrystalline silicon, so as to avoid back side lithography. Cavities as deep as several hundreds of micrometers are produced with very smooth surface and sidewalls. The process is used to produce : a) suspended monocrystalline silicon membranes, b) free standing polysilicon membranes in the form of bridges or cantilevers with lateral dimensions from a few μms to several hundreds of μms. Important applications to silicon integrated devices as sensors, actuators, detectors etc., are foreseen.

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A Microelectronics-Compatible Process for Surface Micromachining of MEMS and MOEMS

Microelectromechanical Systems ◽

10.1115/imece2005-82704 ◽

2005 ◽

Author(s):

Meetul Goyal ◽

Robert C. Anderson ◽

Jordan M. Berg ◽

Richard O. Gale ◽

Mark Holtz ◽

...

Keyword(s):

Sacrificial Layer ◽

Process Conditions ◽

Glass Wafer ◽

Mems Devices ◽

Surface Micromachining ◽

Industrial Facilities ◽

Dry Process ◽

Electrostatically Actuated ◽

Wafer Substrate ◽

Etch Time

Many fabrication steps for micro electromechanical and micro optoelectromechanical systems (MEMS and MOEMS) are carried out on specialized or highly customized tools that are not part of a standard microelectronics process flow. This paper presents a surface micromachining process for electrostatically-actuated MEMS devices using standard microelectronics tools, materials, and process conditions. The result should facilitate MEMS development in university laboratories with a microelectronics focus, and encourage the transfer of MEMS production to aging or underutilized industrial facilities. Aluminum structures, with silicon dioxide or silicon nitride dielectric layers, are built upon a silicon or glass wafer substrate. Shipley SC1827 photoresist provides a 2.7 μm thick sacrificial layer. The release etch is the critical fabrication step. This must be a dry process to avoid stiction, should be isotropic to minimize the etch time, and should be capable of large undercut distances to minimize the need for etch holes. Finally, the etch must be sufficiently selective to allow for the necessary release etch time without significantly impacting non-sacrificial structures. An O2/CHF3 plasma etch has been developed to meet these requirements. Using this process we have designed, fabricated and tested structures with moveable mirrors suspended over multiple drive and sense electrodes.

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Laminated Photoresist Sacrificial Layer Process for 3-D Movable Suspension Microstructures in LIGA-Based Surface Micromachining

Advanced Materials Research ◽

10.4028/www.scientific.net/amr.97-101.2538 ◽

2010 ◽

Vol 97-101 ◽

pp. 2538-2541 ◽

Cited By ~ 6

Author(s):

Yi Bo Wu ◽

Gui Fu Ding ◽

Cong Chun Zhang ◽

Hong Wang

Keyword(s):

Aspect Ratio ◽

High Aspect Ratio ◽

Sacrificial Layer ◽

Low Cost ◽

Three Dimensional ◽

Mems Devices ◽

Metal Structures ◽

Positive Photoresist ◽

Out Of Plane ◽

Freely Moving

The fabrication process of three-dimensional (3D) high-aspect-ratio MEMS devices entirely made of electroplated metals with suspending multilayered microstructures is reported. The technology used is a LIGA-liked micromachining process, called the laminated positive photoresist sacrificial layer process (LPSLP). The LPSLP allows in UV-lithography not only for thick resist mould for electroplating of cascaded metal structures but also for the sacrificial layer for supporting mechanically the suspensions. So far the LPSLP procedure has incorporated with more than five sacrificial layers, which allows for the creation of overhanging structures and freely moving parts like out-of-plane cantilever stacks. A description of the underlying fabrication principle and processing details is discussed in this paper. Thus the proposed procedures open a low-cost route for fabricating micro-components such as cantilevers, bridges, movable electrodes, and freestanding parts.

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Fabrication of Ultrasmooth Polymer Films by Concentration Control and Spin Speed Adjustment

Key Engineering Materials ◽

10.4028/www.scientific.net/kem.645-646.330 ◽

2015 ◽

Vol 645-646 ◽

pp. 330-334

Author(s):

Yan Guo ◽

Wei Guo Liu ◽

Huan Liu ◽

Shun Zhou ◽

Lei Wu ◽

...

Keyword(s):

Polymer Films ◽

High Speed ◽

Smooth Surface ◽

Sacrificial Layer ◽

Polymer Concentration ◽

Polymer Surface ◽

Mems Devices ◽

Dilution Ratio ◽

Spin Speed ◽

Speed Adjustment

In order to obtain ultrasmooth polymer films, in combination with sacrificial layer a variety of impending structures in MEMS devices can be easily prepared. Two methods using polymer concentration control and spin speed adjustment to planarize polymer surface are presented. The influence of polymer concentration and spin speed on the effect of photoresist planarization is studied on. Through a large number of experiments, optimized process parameters are collected. It is found that the roughness was reduced effectively when the spin high speed was 5000rpm for 50 seconds under the condition of volume dilution ratio of 1:5. This process is able to produce a smooth surface structure.

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The Use of Metallographic and SEM Analysis for Characterization of Sidewall Surfaces in MEMS Devices with DRIE Processing

International Symposium on Microelectronics ◽

10.4071/isom-2010-wp5-paper3 ◽

2010 ◽

Vol 2010 (1) ◽

pp. 000703-000706

Author(s):

Colin Stevens ◽

Robert Dean ◽

Samuel Lawrence ◽

Lee Levine

Keyword(s):

Aspect Ratio ◽

High Aspect Ratio ◽

Measurement Techniques ◽

Sem Analysis ◽

Defect Structures ◽

Mems Devices ◽

Depth Of Focus ◽

Surface Conditions ◽

Side Walls

The Bosch Deep Reactive Ion Etch Process is commonly used for the manufacture of MEMS and MOEMS devices that require deep high aspect ratio trenches. In many cases fully released, high aspect ratio features can be generated in one pass. However the process must be understood to avoid generating some of the defect structures that are characteristic of the process. Defects such as scalloping, silicon grass, and undercutting at the interface of a nonconductive layer can be controlled by process parameters and optimization. Measurement and characterization of the defective structures is a key element of controlling them. The use of SEM measurement techniques for characterizing the small features associated with scalloping and silicon grass is essential. No other technique is capable of providing the large depth of focus required to visualize these features. The use of metallographic techniques furthers understanding of the surface conditions on the side walls of these deep trenches.

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Releasing high aspect ratio SU-8 microstructures using AZ photoresist as a sacrificial layer on metallized Si substrates

Microsystem Technologies ◽

10.1007/s00542-013-1740-0 ◽

2013 ◽

Vol 19 (11) ◽

pp. 1863-1871 ◽

Cited By ~ 22

Author(s):

Kia Hian Lau ◽

Archit Giridhar ◽

Sekar Harikrishnan ◽

Nalam Satyanarayana ◽

Sujeet K. Sinha

Keyword(s):

Aspect Ratio ◽

High Aspect Ratio ◽

Sacrificial Layer ◽

Si Substrates

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Polysilicon sacrificial layer etching using ClF3 for thin film encapsulation of silicon acceleration sensors with high aspect ratio

Sensors and Actuators A Physical ◽

10.1016/j.sna.2006.03.017 ◽

2007 ◽

Vol 133 (1) ◽

pp. 259-265 ◽

Cited By ~ 6

Author(s):

Lars Metzger ◽

Frank Fischer ◽

Wilfried Mokwa

Keyword(s):

Thin Film ◽

Aspect Ratio ◽

High Aspect Ratio ◽

Sacrificial Layer ◽

Acceleration Sensors ◽

Thin Film Encapsulation

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Novel Friction Test Structures for Microelectromechanical Systems

Applied Mechanics ◽

10.1115/imece2006-14054 ◽

2006 ◽

Author(s):

Luke J. Currano ◽

Miao Yu ◽

Balakumar Balachandran

Keyword(s):

Steady State ◽

Friction Coefficient ◽

Smooth Surface ◽

Microelectromechanical Systems ◽

Rough Surfaces ◽

Sliding Contact ◽

Silicon Surfaces ◽

Mems Devices ◽

Friction Test ◽

Friction Measurements

Novel friction test structures that are suitable for determining the friction coefficient of vertical surfaces in microelectromechanical systems (MEMS) devices are fabricated and used to carry out friction measurements on smooth and rough deep reactive ion etched (DRIE) silicon surfaces. The results obtained for rough surfaces show that the friction coefficient decreases as the sliding contact is put through the first eight to ten cycles, before it reaches a steady-state value that closely matches the friction coefficient of the smooth surface.

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Porous Silicon as a Sacrificial Material for Microstructures Fabrication

MRS Proceedings ◽

10.1557/proc-605-281 ◽

1999 ◽

Vol 605 ◽

Cited By ~ 3

Author(s):

M. Morel ◽

M. Le Berre ◽

V. Lysenko ◽

G. Delhomme ◽

A. Dittmar ◽

...

Keyword(s):

Porous Silicon ◽

Electrochemical Etching ◽

Sacrificial Layer ◽

Formation Rate ◽

Free Standing ◽

Wide Range ◽

Silicon Bulk ◽

Reduced Costs ◽

Optimized Conditions ◽

Koh Etching

AbstractPorous silicon (PS) is generated by electrochemical etching in hydrofluoric acid (HF). Recently porous silicon has been applied to micromachining and micro-devices as an alternate material, this material being used as a sacrificial layer. This technology competes with conventional techniques like surface and bulk micromachining regarding its speed, simplicity and reduced costs. A wide range of microstructures and free-standing structures can be fabricated with a large freedom of design in relation to the isotropic behavior of the etching. A sacrificial layer may be realized fast over varying thickness (PS formation rate 45 μm/h compared to silicon bulk micromachining rate 20 μm/h for KOH etching).This contribution is devoted to the materials aspects of patterning and processing: we will show how basic microstructures (trenches, polysilicon cantilevers, polysilicon free-standing membranes) may be fabricated using a very simple process based on a single photolithography. The important points are the choice of the mask, porous silicon properties as a function of its formation parameters and the choice of the solution removing the sacrificial layer. The morphology and porosity of the porous silicon layers are indeed mainly determined by the electrolyte composition and by the current density for a given substrate type. Optimized conditions (HF 15% and 80 mA/cm2) lead us to an appropriate porous silicon. Finally the applicability of this technology for various microsensors will be underlined.

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