Electrical Characterization of Epitaxial Graphene Field-Effect Transistors with High-k Al2O3 Gate Dielectric Fabricated on SiC Substrates

2015 ◽  
Vol 821-823 ◽  
pp. 937-940 ◽  
Author(s):  
Toby Hopf ◽  
Konstantin Vassilevski ◽  
Enrique Escobedo-Cousin ◽  
Peter King ◽  
Nicholas G. Wright ◽  
...  

Top-gated field-effect transistors have been created from bilayer epitaxial graphene samples that were grown on SiC substrates by a vacuum sublimation approach. A high-quality dielectric layer of Al2O3was grown by atomic layer deposition to function as the gate oxide, with an e-beam evaporated seed layer utilized to promote uniform growth of Al2O3over the graphene. Electrical characterization has been performed on these devices, and temperature-dependent measurements yielded a rise in the maximum transconductance and a significant shifting of the Dirac point as the operating temperature of the transistors was increased.

2007 ◽  
Vol 7 (11) ◽  
pp. 4101-4105
Author(s):  
Ahnsook Yoon ◽  
Woong-Ki Hong ◽  
Takhee Lee

We report the fabrication and electrical characterization of ZnO nanowire field effect transistors (FETs). Dielectrophoresis technique was used to directly align ZnO nanowires between lithographically prepatterned source and drain electrodes, and spin-coated polyvinylphenol (PVP) polymer thin layer was used as a gate dielectric layer in "top-gate" FET device configuration. The electrical characteristics of the top-gate ZnO nanowire FETs were found to be comparable to the conventional "bottom-gate" nanowire FETs with a SiO2 gate dielectric layer, suggesting the directly-assembled nanowire FET with a polymer gate dielectric layer is a useful device structure of nanowire FETs.


2014 ◽  
Vol 778-780 ◽  
pp. 549-552 ◽  
Author(s):  
Jing Hua Xia ◽  
David M. Martin ◽  
Sethu Saveda Suvanam ◽  
Carl Mikael Zetterling ◽  
Mikael Östling

LaxHfyO nanolaminated thin film deposited using atomic layer deposition process has been studied as a high-K gate dielectric in 4H-SiC MOS capacitors. The electrical and nano-laminated film characteristics were studied with increasing post deposition annealing (PDA) in N2O ambient. The result shows that high quality LaxHfyO nano-laminated thin films with good interface and bulk qualities are fabricated using high PDA temperature.


2019 ◽  
Vol 35 (2) ◽  
pp. 297-304 ◽  
Author(s):  
Shojan P. Pavunny ◽  
R. Thomas ◽  
T.S. Kalkur ◽  
Jurgen Schubert ◽  
E. Fachini ◽  
...  

2017 ◽  
Vol 178 ◽  
pp. 190-193 ◽  
Author(s):  
Pavel Bolshakov ◽  
Peng Zhao ◽  
Angelica Azcatl ◽  
Paul K. Hurley ◽  
Robert M. Wallace ◽  
...  

2016 ◽  
Vol 8 (44) ◽  
pp. 29872-29876 ◽  
Author(s):  
Cheng-Yin Wang ◽  
Canek Fuentes-Hernandez ◽  
Minseong Yun ◽  
Ankit Singh ◽  
Amir Dindar ◽  
...  

2007 ◽  
Vol 7 (11) ◽  
pp. 4101-4105 ◽  
Author(s):  
Ahnsook Yoon ◽  
Woong-Ki Hong ◽  
Takhee Lee

We report the fabrication and electrical characterization of ZnO nanowire field effect transistors (FETs). Dielectrophoresis technique was used to directly align ZnO nanowires between lithographically prepatterned source and drain electrodes, and spin-coated polyvinylphenol (PVP) polymer thin layer was used as a gate dielectric layer in "top-gate" FET device configuration. The electrical characteristics of the top-gate ZnO nanowire FETs were found to be comparable to the conventional "bottom-gate" nanowire FETs with a SiO2 gate dielectric layer, suggesting the directly-assembled nanowire FET with a polymer gate dielectric layer is a useful device structure of nanowire FETs.


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