Structure and Surface Morphology of Thermal SiO2 Grown on 4H-SiC by Metal-Enhanced Oxidation Using Barium

2017 ◽  
Vol 897 ◽  
pp. 340-343 ◽  
Author(s):  
Atthawut Chanthaphan ◽  
Yoshihito Katsu ◽  
Takuji Hosoi ◽  
Takayoshi Shimura ◽  
Heiji Watanabe
Keyword(s):  
Electrical Properties ◽  
Surface Morphology ◽  
Silicon Dioxide ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Surface Roughening ◽  
Oxide Surface ◽  
Capping Layer ◽  
Enhanced Oxidation

Surface morphology and electrical properties of silicon dioxide (SiO2) on 4H-SiC substrates formed by metal-enhanced oxidation (MEO) using barium (Ba) atoms were systematically investigated. It was found that severe surface roughening caused by Ba-MEO can be suppressed by using SiO2 capping prior to MEO. The Ba atoms at the SiO2/SiC interface were found to diffuse to the oxide surface through the deposited SiO2 capping layer, and then the Ba density reduced to ~1014 cm-2 before stable MEO. The resulting SiO2/SiC interface showed the reduced interface state density but the insulating property of the oxides was significantly degraded.

Processing and Characterization of MOS Capacitors Fabricated on 2°-Off Axis 4H-SiC Epilayers

2016 ◽  
Vol 858 ◽  
pp. 663-666
Author(s):  
Marilena Vivona ◽  
Patrick Fiorenza ◽  
Tomasz Sledziewski ◽  
Alexandra Gkanatsiou ◽  
Michael Krieger ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Interface State ◽  
State Density ◽  
Metal Oxide Semiconductor ◽  
Interface State Density ◽  
Device Fabrication ◽  
Oxide Semiconductor ◽  
Mos Capacitors ◽  
Oxide Breakdown

In this work, the electrical properties of SiO2/SiC interfaces onto a 2°-off axis 4H-SiC layer were studied and validated through the processing and characterization of metal-oxide-semiconductor (MOS) capacitors. The electrical analyses on the MOS capacitors gave an interface state density in the low 1×1012 eV-1cm-2 range, which results comparable to the standard 4°-off-axis 4H-SiC, currently used for device fabrication. From Fowler-Nordheim analysis and breakdown measurements, a barrier height of 2.9 eV and an oxide breakdown of 10.3 MV/cm were determined. The results demonstrate the maturity of the 2°-off axis material and pave the way for the fabrication of 4H-SiC MOSFET devices on this misorientation angle.

Electrical Properties Evaluation on High Quality Hetero-Epitaxial 3C-SiC(001) for MOSFET Applications

2015 ◽  
Vol 821-823 ◽  
pp. 773-776 ◽  
Author(s):  
Ruggero Anzalone ◽  
Stefania Privitera ◽  
Alessandra Alberti ◽  
Nicolo’ Piluso ◽  
Patrick Fiorenza ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Electrical Conductance ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Crystalline Quality ◽  
X Ray Diffraction ◽  
Mos Capacitors ◽  
Afm Analysis ◽  
The Relationship

The effect of the crystal quality and surface morphology on the electrical properties of MOS capacitors has been studied in devices manufactured on 3C-SiC epitaxial layers grown on Silicon (100) substrate. The interface state density, which represents one of the most important parameters for the 3C-SiC MOSFET development, has been determined through capacitance measurements. A cross-correlation between High Resolution X-ray Diffraction, AFM analysis and electrical conductance measurements has allowed determining the relationship between the crystalline quality and the interface state density. By improving the crystalline quality, a decrease of the interface state density down to 1010cm-2eV-1was observed.

scholarly journals Electrical properties and the determination of interface state density from I-V, C-f and G-f measurements in Ir/Ru/n-InGaN Schottky barrier diode

2017 ◽  
Vol 51 (12) ◽  
pp. 1698
Author(s):  
R. Padma ◽  
V. Rajagopal Reddy
Keyword(s):  
Electrical Properties ◽  
Barrier Height ◽  
Series Resistance ◽  
Forward Bias ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Current Voltage ◽  
Density Of Interface States

The electrical properties of the Ir/Ru Schottky contacts on n-InGaN have been investigated by current-voltage (I-V), capacitance-voltage (C-V), capacitance-frequency (C-f) and conductance-frequency (G-f) measurements. The obtained mean barrier height and ideality factor from I-V are 0.61 eV and 1.89. The built-in potential, doping concentration and barrier height values are also estimated from the C-V measurements and the corresponding values are 0.62 V, 1.20x1017 cm-3 and 0.79 eV, respectively. The interface state density (NSS) obtained from forward bias I-V characteristics by considering the series resistance (RS) values are lower without considering the series resistance (RS). Furthermore, the interface state density (NSS) and relaxation time (tau) are also calculated from the experimental C-f and G-f measurements. The NSS values obtained from the I-V characteristics are almost three orders higher than the NSS values obtained from the C-f and G-f measurements. The experimental results depict that NSS and tau are decreased with bias voltage. The frequency dependence of the series resistance (RS) is attributed to the particular distribution density of interface states. DOI: 10.21883/FTP.2017.12.45189.8340

Interfacial Properties of SiO2 Grown on 4H-SiC: Comparison between N2O and Wet O2 Oxidation Ambient

2006 ◽  
Vol 527-529 ◽  
pp. 979-982 ◽  
Author(s):  
Antonella Poggi ◽  
Francesco Moscatelli ◽  
Andrea Scorzoni ◽  
Giovanni Marino ◽  
Roberta Nipoti ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
Silicon Dioxide ◽  
Conduction Band ◽  
Interface State ◽  
Growth Conditions ◽  
State Density ◽  
Interface State Density ◽  
Conduction Band Edge ◽  
Wet Oxidation ◽  
Better Than

Many investigations have been conducted on the growth conditions of SiO2 on SiC to improve the oxide quality and the properties of the silicon carbide-silicon dioxide interface. In this work a comparison between a wet oxidation and an oxidation in N2O ambient diluted in N2 is proposed. The interface state density Dit near the conduction-band edge of SiC has been evaluated by conventional C-V measurements obtaining results similar or better than the literature data. Furthermore, the slow trapping phenomena have been studied and preliminary results are reported.

Low Interface State Density at Pseudomorphic ZnSe/Epitaxial GaAs Interface

1989 ◽  
Vol 145 ◽  
Author(s):  
Q.-D. Qian ◽  
J. Qiu ◽  
M. Kobayashi ◽  
R.L. Gunshor ◽  
L.A. Kolodziejski ◽  
...  
Keyword(s):  
Electrical Properties ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Epitaxial Gaas ◽  
And Inversion

AbstractThe electrical properties of pseudomorphic ZnSe/epilayer GaAs heterointerfaces, grown by MBE, have been investigated by capacitance versus voltage (C-V) and current versus voltage (I- V) measurements. Hole accumulation and inversion were observed in ZnSe/p-GaAs interfaces and ZnSe/n-GaAs interfaces, respectively. The C-V characteristics of the Au/ZnSe/p-GaAs capacitors are nearly ideal, exhibiting an interface state density (2.5x1011cm-2) which compares favorably with the densities reported at AlGaAs/GaAs interfaces.

Effect of Atomic Structure at the Epitaxial CaF2 /Si(111) Interface on Electrical Properties

1987 ◽  
Vol 102 ◽  
Author(s):  
J.L. Batstone ◽  
Julia M. Phillips ◽  
E.C. Hunke
Keyword(s):  
Electrical Properties ◽  
Atomic Structure ◽  
High Resolution Electron Microscopy ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Dramatic Improvement ◽  
Rapid Thermal Anneal ◽  
Resolution Electron ◽  
Before And After

ABSTRACTHigh resolution electron microscopy has been used to determine the atomic structure at the epitaxial CaF2 /Si(111) interface before and after a rapid thermal anneal. Direct Ca-Si bonding at the interface, with 8-fold coordinated Ca atoms is observed in as-grown layers. Fluorine is preferentially removed from the interface during a rapid thermal anneal leaving 5-fold coordinated Ca atoms. A dramatic improvement in the electrical properties of the interface is observed after annealing. The measured interface state density is reduced from ≳1013 cm−2 to ≲1011cm−2. This has been correlated with the removal of F from the interface. No evidence for direct F-Si bonding is observed.

NF3 Added Oxidation of 4H-SiC(0001) and Suppression of Interface Degradation

2014 ◽  
Vol 778-780 ◽  
pp. 619-622 ◽  
Author(s):  
Ryu Hasunuma ◽  
Masahito Nagoshi ◽  
Kikuo Yamabe
Keyword(s):  
Electrical Properties ◽  
Oxidation Process ◽  
Interface State ◽  
State Density ◽  
Interface State Density ◽  
Interface Properties ◽  
Low Leakage ◽  
Low Leakage Current ◽  
Leakage Characteristics ◽  
Proper Balance

The electrical properties of SiO2/4H-SiC(0001) was characterized, and it was confirmed that the NF3 added oxidation in O2 can achieve interface with low interface state density. Optimization of NF3 added oxidation process was attempted to obtain films with both good interface properties and low leakage current. It was concluded that optimization of oxidation process should take account of obtaining proper balance among the rate of oxidation, which generates impurity carbon, the ability of carbon removal, and the rate of SiO2 etching which also affects the leakage characteristics.

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