Improving Mechanical Strength and Surface Uniformity to Prepare High Quality Thinned 4H-SiC Epitaxial Wafer Using Si-Vapor Etching Technology

2017 ◽  
Vol 897 ◽  
pp. 375-378 ◽  
Author(s):  
Satoshi Torimi ◽  
Koji Ashida ◽  
Norihito Yabuki ◽  
Masato Shinohara ◽  
Takuya Sakaguchi ◽  
...  
Keyword(s):  
Silicon Carbide ◽  
Mechanical Strength ◽  
Chemical Etching ◽  
Imaging Technique ◽  
Low Energy ◽  
Indentation Hardness ◽  
High Quality ◽  
Surface Step ◽  
Low Energy Electron ◽  
Sic Wafer

As a new thinning and surface planarizing process of Silicon Carbide (SiC) wafer, we propose the completely thermal-chemical etching process; Si-vapor etching (Si-VE) technology. In this work, the effects of mechanical strength and surface step-terrace structure by Si-VE are investigated on the 4° off-axis 4H-SiC (0001) Si-face substrates. The indentation hardness of Si-VE surface is superior to the conventional chemo-mechanical polishing (CMP) surface even after epitaxial growth. The transverse strength of thinned Si-VE substrate is also superior to the conventional mechanically ground substrate. The surface step-terrace structures are observed by the low energy electron channeling contrast (LE-ECC) imaging technique. The latent scratch causes bunched step lines (BSLs) with various inhomogeneous step morphologies only on the CMP surface.

Planarization of 6-Inch 4H-SiC Wafer Using Catalyst-Referred Etching

2015 ◽  
Vol 821-823 ◽  
pp. 537-540
Author(s):  
Ai Isohashi ◽  
Yasuhisa Sano ◽  
Tomohisa Kato ◽  
Kazuto Yamauchi
Keyword(s):  
Silicon Carbide ◽  
Chemical Etching ◽  
Etching Rate ◽  
Wafer Surface ◽  
Sic Wafer

Catalyst-referred etching (CARE) is a planarization method based on the chemical etching reaction, which does not need abrasives. In this paper, CARE was applied to the planarization of 6-inch silicon carbide (SiC) wafers, and removal properties were investigated. The etching rate was about 20nm/h, which is almost equal to that of 2-inch SiC wafer (16 nm/h). The rms roughness was reduced along with the removal depth, and step-terrace structure was observed in whole area of the on-axis wafer surface.

STUDIES OF $4{\rm H}\mbox{--}{\rm SiC}(0001){\rm Si}(\sqrt3\times\sqrt3)$ AND (0001)C(3×3) SURFACES AND THEIR METALLIZATION PROCESS BY NI USING STM, AES AND LEED

2000 ◽  
Vol 07 (05n06) ◽  
pp. 679-682
Author(s):  
M. IWAMI ◽  
N. HATTORI ◽  
T. FUJIMOTO ◽  
M. HIRAI ◽  
M. KUSAKA ◽  
...  
Keyword(s):  
Electron Diffraction ◽  
Low Energy ◽  
Energy Electron ◽  
Scanning Tunneling ◽  
Island Growth ◽  
Tunneling Microscopy ◽  
Low Energy Electron Diffraction ◽  
Deposited Metal ◽  
Low Energy Electron ◽  
Sic Wafer

Several methods have been tried to prepare clean surfaces of 4H–SiC(0001)Si and C, whose surface atomic, or electronic, structures have been studied by LEED (low energy electron diffraction) STM (scanning tunneling microscopy) and AES (Auger electron spectroscopy). Some sequential chemical treatments, for example, agitation in an organic solvent and dipping in HF solution, followed by the heating of a SiC wafer in UHV (ultrahigh vacuum, below 10-7 Pa) at 950°C, gave either a [Formula: see text] or 3×3 superstructure, observed by LEED (low energy electron diffraction), for the SiC(0001) Si or C surface, respectively. An elongated NH4F treatment followed by a heat treatment in UHV at ~950°C gave a rather flat region to be investigated by STM, where a [Formula: see text] superstructure for the SiC(0001) Si surface has been observed. In the case of metal (Ni) atom deposition on SiC(0001) [Formula: see text] and (0001)C(3×3) surfaces, AES and LEED analysis have clarified that deposited metal atoms form islands up to ~5 Å. However, Ni atoms dispersed uniformly at the very beginning of the deposition, which means that the Ni overlayer piles up in layer followed by island growth mode.

Growth and Intercalation of Graphene on Silicon Carbide Studied by Low-Energy Electron Microscopy

2017 ◽  
Vol 529 (11) ◽  
pp. 1700046 ◽  
Author(s):  
Florian Speck ◽  
Markus Ostler ◽  
Sven Besendörfer ◽  
Julia Krone ◽  
Martina Wanke ◽  
...  
Keyword(s):  
Electron Microscopy ◽  
Silicon Carbide ◽  
Low Energy ◽  
Energy Electron ◽  
Low Energy Electron

Tomographic reconstruction of composite small-screen in-line holograms

2001 ◽  
Vol 79 (1) ◽  
pp. 29-36 ◽  
Author(s):  
T A Rothwell ◽  
M R.A. Shegelski
Keyword(s):  
Point Source ◽  
Tomographic Reconstruction ◽  
Low Energy ◽  
Energy Electron ◽  
Experimental Investigations ◽  
Screen Size ◽  
High Quality ◽  
Low Energy Electron ◽  
Small Screen

We generate and combine simulated holograms for low energy electron point source (LEEPS) microscopy. Using a relatively small screen size, we build a ``composite hologram'' from four different holograms, each obtained using the small screen. We show that reconstructions of high quality can be extracted from the composite hologram by implementing methods we developed in previous investigations. These high-quality reconstructions are obtained using a screen size that is one quarter the size of screens we have used previously. The implications of our results for experimental investigations is discussed. PACS No.: 61.14Nm

WAVE OPTICAL TREATMENT OF SURFACE STEP CONTRAST IN LOW-ENERGY ELECTRON MICROSCOPY

2009 ◽  
Vol 16 (06) ◽  
pp. 855-867 ◽  
Author(s):  
S. M. KENNEDY ◽  
N. E. SCHOFIELD ◽  
D. M. PAGANIN ◽  
D. E. JESSON
Keyword(s):  
Electron Microscopy ◽  
Transfer Function ◽  
Imaging System ◽  
Two Dimensions ◽  
Low Energy ◽  
Energy Electron ◽  
Surface Step ◽  
Optical Treatment ◽  
Low Energy Electron ◽  
Step Contrast

A wave optical treatment of surface step contrast in a low-energy electron microscopy (LEEM) is presented. The aberrations of an idealised LEEM imaging system are directly incorporated into a transfer function (TF) and image simulations of surface steps are evaluated in one and two dimensions. Under the special circumstances of a weak phase object, the simplified form of the contrast transfer function (CTF) is used to discuss LEEM image contrast and optimum defocus conditions.

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