Power-Efficient Phase Change Memory Using Silicon Carbide as a Buffer Layer

Power consumption has long been a great obstacle in phase change memory technology. Silicon carbide was introduced to be a buffer layer between the phase change material and the metal electrode in this work. The results showed that the new structure mitigated the energy consumption and maintained the advantage of high speed. This is attributed to the thin SiC buffer layer that helps confine the generated Joule heat inside the active phase change volume and form more conducting paths by the high efficiency of the heat utilization. Additionally, another key role — inhibition of the material separation, is conducive to achieving stable and sustainable electrical operations.

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Simulation and Design of a Silicon Nanowire based Phase Change Memory Cell

MRS Proceedings ◽

10.1557/opl.2012.1135 ◽

2012 ◽

Vol 1431 ◽

Author(s):

Ramin Banan Sadeghian ◽

Yusuf Leblebici ◽

Ali Shakouri

Keyword(s):

Phase Change ◽

High Speed ◽

Low Cost ◽

Silicon Nanowire ◽

Phase Change Memory ◽

Random Access ◽

Memory Cell ◽

Oxide Thickness ◽

Nanowire Diameter ◽

Change Memory

ABSTRACTIn this work we present preliminary calculations and simulations to demonstrate feasibility of programming a nanoscale Phase Change Random Access Memory (PCRAM) cell by means of a silicon nanowire ballistic transistor (SNWBT). Memory cells based on ballistic transistors bear the advantage of having a small size and high-speed operation with low power requirements. A one-dimensional MOSFET model (FETToy) was used to estimate the output current of the nanowire as a function of its diameter. The gate oxide thickness was 1.5 nm, and the Fermi level at source was set to -0.32 eV. For the case of VDS = VGS = 1 V, when the nanowire diameter was increased from 1 to 60 nm, the output power density dropped from 109 to 106 W cm-2 , while the current increased from 20 to 90 μA. Finite element electro-thermal analysis were carried out on a segmented cylindrical phase-change memory cell made of Ge2Sb2Te5 (GST) chalcogenide, connected in series to the SNWBT. The diameter of the combined device, d, and the aspect ratio of the GST region were selected so as to achieve optimum heating of the GST. With the assumption that the bulk thermal conductivity of GST does not change significantly at the nanoscale, it was shown that for d = 24 nm, a ‘reset’ programming current of ID = 80 μA can heat the GST up to its melting point. The results presented herein can help in the design of low cost, high speed, and radiation tolerant nanoscale PCRAM devices.

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The Effect of Channel Length on Phase Transition of Phase Change Memory

International Journal of Engineering & Technology ◽

10.14419/ijet.v7i3.11.15923 ◽

2018 ◽

Vol 7 (3.11) ◽

pp. 25

Author(s):

M S. A.Aziz ◽

F H. M.Fauzi ◽

Z Mohamad ◽

R I. Alip

Keyword(s):

Phase Transition ◽

Silicon Carbide ◽

Phase Change ◽

Pulse Width ◽

Crystalline State ◽

Phase Change Memory ◽

Amorphous State ◽

Channel Length ◽

Change Memory

The phase transition of germanium antimony tellurium (GST) and the temperature of GST were investigated using COMSOL Multiphysic 5.0 software. Silicon carbide was using as a heater layer in the separate heater structure of PCM. These simulations have a different channel of SiC. The temperature of GST and the phase transition of GST can be obtained from the simulation. From the simulation, the 300 nm channel of SiC can change the GST from amorphous to crystalline state at 0.7V with 100 ns pulse width. The 800 nm channel of SiC can change the GST from amorphous to crystalline state at 1.1V with 100 ns pulse width. Results demonstrated that the channel of SIC can affecting the temperature of GST and the GST changes from amorphous state to crystalline state. As the channel of SiC decreased, the temperature of GST was increased and the GST was change to crystalline state quickly.

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