scholarly journals Countability of Inductive Types Formalized in the Object-Logic Level

2021 ◽  
Vol 337 ◽  
pp. 55-70
Author(s):  
Qinxiang Cao ◽  
Xiwei Wu
Keyword(s):  
Inductive Types ◽  
Logic Level

Cubical Agda: A dependently typed programming language with univalence and higher inductive types

2021 ◽  
Vol 31 ◽  
Author(s):  
ANDREA VEZZOSI ◽  
ANDERS MÖRTBERG ◽  
ANDREAS ABEL
Keyword(s):  
Programming Language ◽  
Type Theory ◽  
Type Checking ◽  
Dependent Type Theory ◽  
Wide Range ◽  
General Schema ◽  
Direct Definition ◽  
Inductive Types ◽  
Definition Of ◽  
Cubical Type Theory

Abstract Proof assistants based on dependent type theory provide expressive languages for both programming and proving within the same system. However, all of the major implementations lack powerful extensionality principles for reasoning about equality, such as function and propositional extensionality. These principles are typically added axiomatically which disrupts the constructive properties of these systems. Cubical type theory provides a solution by giving computational meaning to Homotopy Type Theory and Univalent Foundations, in particular to the univalence axiom and higher inductive types (HITs). This paper describes an extension of the dependently typed functional programming language Agda with cubical primitives, making it into a full-blown proof assistant with native support for univalence and a general schema of HITs. These new primitives allow the direct definition of function and propositional extensionality as well as quotient types, all with computational content. Additionally, thanks also to copatterns, bisimilarity is equivalent to equality for coinductive types. The adoption of cubical type theory extends Agda with support for a wide range of extensionality principles, without sacrificing type checking and constructivity.

scholarly journals Large and Infinitary Quotient Inductive-Inductive Types

2020 ◽  
Author(s):  
András Kovács ◽  
Ambrus Kaposi
Keyword(s):  
Inductive Types

scholarly journals Well-definedness and observational equivalence for inductive–coinductive programs

2019 ◽  
Vol 29 (4) ◽  
pp. 419-468
Author(s):  
Henning Basold ◽  
Helle Hvid Hansen
Keyword(s):  
Fixed Point ◽  
Modal Logic ◽  
The Other ◽  
Observational Equivalence ◽  
Other Hand ◽  
Inductive Types ◽  
Point Types ◽  
Usual Topology

Abstract We define notions of well-definedness and observational equivalence for programs of mixed inductive and coinductive types. These notions are defined by means of tests formulas which combine structural congruence for inductive types and modal logic for coinductive types. Tests also correspond to certain evaluation contexts. We define a program to be well-defined if it is strongly normalizing under all tests, and two programs are observationally equivalent if they satisfy the same tests. We show that observational equivalence is sufficiently coarse to ensure that least and greatest fixed point types are initial algebras and final coalgebras, respectively. This yields inductive and coinductive proof principles for reasoning about program behaviour. On the other hand, we argue that observational equivalence does not identify too many terms, by showing that tests induce a topology that, on streams, coincides with usual topology induced by the prefix metric. As one would expect, observational equivalence is, in general, undecidable, but in order to develop some practically useful heuristics we provide coinductive techniques for establishing observational normalization and observational equivalence, along with up-to techniques for enhancing these methods.

Logic Level Modeling

1995 ◽  
pp. 87-126
Author(s):  
Donald E. Thomas ◽  
Philip R. Moorby
Keyword(s):  
Logic Level

scholarly journals Refining Inductive Types

2012 ◽  
Vol 8 (2) ◽  
Author(s):  
Robert Atkey ◽  
Patricia Johann ◽  
Neil Ghani
Keyword(s):  
Inductive Types

scholarly journals Efficient and Fast Current Curve Estimation of CMOS Digital Circuits at the Logic Level

2002 ◽  
pp. 400-408 ◽  
Author(s):  
Paulino Ruiz-de-Clavijo ◽  
Jorge Juan ◽  
Manuel J. Bellido ◽  
Alejandro Millán ◽  
David Guerrero
Keyword(s):  
Digital Circuits ◽  
Curve Estimation ◽  
Current Curve ◽  
Logic Level

Low Power Arithmetic Circuit Design for Multimedia Applications

2016 ◽  
pp. 252-282
Author(s):  
Senthil C. Pari
Keyword(s):  
Low Power ◽  
High Performance ◽  
Design Method ◽  
Propagation Delay ◽  
Arithmetic Circuit ◽  
Noise Margin ◽  
Binary Arithmetic ◽  
Pass Transistor ◽  
Circuit Family ◽  
Logic Level

The objective of this chapter is to describe the various designed arithmetic circuit for an application of multimedia circuit that can be used in a high-performance or mobile microprocessor with a particular set of optimisation criteria. The aim of this chapter is to describe the design method of binary arithmetic especially using by CMOS and Pass Transistor Logic technique. The pass transistor techniques are reduced the noise margin for small circuit, which can be explained in this chapter. This chapter further describe the types of arithmetic and its techniques. The technique design principle procedure should make the following decisions: circuit family (complementary static CMOS, pass-transistor, or Shannon Theorem based); type of arithmetic to be used. The decisions on the designed logic level significantly affect the propagation delay, area and power dissipation.

High-Performance SIP Half-Bridge IPM Based on 35mΩ/1200V SiC Stack-Cascode

2020 ◽  
Vol 1004 ◽  
pp. 1016-1021
Author(s):  
Peter Alexandrov ◽  
Anup Bhalla ◽  
Xue Qing Li ◽  
Jens Eltze
Keyword(s):  
High Performance ◽  
Control Voltage ◽  
Switching Losses ◽  
High Side ◽  
Power Modules ◽  
Logic Level ◽  
Gate Charge

A SiC-based high-performance Intelligent Power Modules (IPM) was developed. It is a System In Package (SIP) module that consist of a half-bridge with driver. In the developed SIP IPM, the internal half-bridge is made up of UnitedSiC 35mΩ/1200V Stack-Cascode switches (UF3SC120035Z) which have low on-resistance, low gate charge, simple gate drive of VGS=0 or-5V to VGS=12V, excellent integral body diode and very low switching losses. The module operates with control voltage of 12-15V for both the low and high side switches, and a logic level input that can be 3.3V, 5V or 12V. We believe that this module will enable extremely efficient switching up to 250-400kHz, depending on topology, offering several hundred kHz even in hard-switched applications.

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