High-Performance SIP Half-Bridge IPM Based on 35mΩ/1200V SiC Stack-Cascode

2020 ◽  
Vol 1004 ◽  
pp. 1016-1021
Author(s):  
Peter Alexandrov ◽  
Anup Bhalla ◽  
Xue Qing Li ◽  
Jens Eltze

A SiC-based high-performance Intelligent Power Modules (IPM) was developed. It is a System In Package (SIP) module that consist of a half-bridge with driver. In the developed SIP IPM, the internal half-bridge is made up of UnitedSiC 35mΩ/1200V Stack-Cascode switches (UF3SC120035Z) which have low on-resistance, low gate charge, simple gate drive of VGS=0 or-5V to VGS=12V, excellent integral body diode and very low switching losses. The module operates with control voltage of 12-15V for both the low and high side switches, and a logic level input that can be 3.3V, 5V or 12V. We believe that this module will enable extremely efficient switching up to 250-400kHz, depending on topology, offering several hundred kHz even in hard-switched applications.

2019 ◽  
Vol 963 ◽  
pp. 797-800 ◽  
Author(s):  
Ajit Kanale ◽  
Ki Jeong Han ◽  
B. Jayant Baliga ◽  
Subhashish Bhattacharya

The high-temperature switching performance of a 1.2kV SiC JBSFET is compared with a 1.2kV SiC MOSFET using a clamped inductive load switching circuit representing typical H-bridge inverters. The switching losses of the SiC MOSFET are also evaluated with a SiC JBS Diode connected antiparallel to it. Measurements are made with different high-side and low-side device options across a range of case temperatures. The JBSFET is observed to display a reduction in peak turn-on current – up to 18.9% at 150°C and a significantly lesser turn-on switching loss – up to 46.6% at 150°C, compared to the SiC MOSFET.


Author(s):  
Senthil C. Pari

The objective of this chapter is to describe the various designed arithmetic circuit for an application of multimedia circuit that can be used in a high-performance or mobile microprocessor with a particular set of optimisation criteria. The aim of this chapter is to describe the design method of binary arithmetic especially using by CMOS and Pass Transistor Logic technique. The pass transistor techniques are reduced the noise margin for small circuit, which can be explained in this chapter. This chapter further describe the types of arithmetic and its techniques. The technique design principle procedure should make the following decisions: circuit family (complementary static CMOS, pass-transistor, or Shannon Theorem based); type of arithmetic to be used. The decisions on the designed logic level significantly affect the propagation delay, area and power dissipation.


2012 ◽  
Vol 2012 (HITEC) ◽  
pp. 000402-000406
Author(s):  
B. Passmore ◽  
J. Hornberger ◽  
B. McPherson ◽  
J. Bourne ◽  
R. Shaw ◽  
...  

A high temperature, high performance power module was developed for extreme environment systems and applications to exploit the advantages of wide bandgap semiconductors. These power modules are rated > 1200V, > 100A, > 250 °C, and are designed to house any SiC or GaN device. Characterization data of this power module housing trench MOSFETs is presented which demonstrates an on-state current of 1500 A for a full-bridge switch position. In addition, switching waveforms are presented that exhibit fast transition times.


2018 ◽  
Vol 924 ◽  
pp. 822-826
Author(s):  
Jon Q. Zhang ◽  
Matthew McCain ◽  
Brett Hull ◽  
Jeff Casady ◽  
Scott Allen ◽  
...  

In this paper, we present our latest results on 650 V 4H-SiC DMOSFET developments for dual-side sintered power modules in electric drive vehicles. A low specific on-resistance (Rsp,on) of 1.8 mΩ⋅cm2has been achieved on 650 V, 7 mΩ 4H-SiC DMOSFETs at 25°C, which increases to 2.4 mΩ⋅cm2at 150°C. For the first time, the DMOSFET chip is designed specifically for use in dual-side soldering and sintering processes, and a 650 V, 1.7 mΩ SiC DMOSFET multichip half bridge power module has been built using the wirebond-free assembly. Compared to a similarly rated Si IGBT module, the conduction and switching losses were reduced by 80% and ~50%, respectively.


2020 ◽  
Vol 126 (3) ◽  
Author(s):  
Ravi Ranjan ◽  
Nitesh Kashyap ◽  
Ashish Raman

2008 ◽  
Vol 600-603 ◽  
pp. 901-906 ◽  
Author(s):  
Kathrin Rueschenschmidt ◽  
Michael Treu ◽  
Roland Rupp ◽  
Peter Friedrichs ◽  
Rudolf Elpelt ◽  
...  

Today a main focus in high efficiency power electronics based on silicon carbide (SiC) lies on the development of an unipolar SiC switch. This paper comments on the advantages of SiC switching devices in comparison to silicon (Si) switches, the decision for the SiC JFET against the SiC MOSFET, and will show new experimental results on SiC JFETs with focus on the production related topics like process window and parameter homogeneity which can be achieved with the presented device concept. Due to material properties unipolar SiC switches have, other than their Si high voltage counterparts, very low gate charge, good body diode performance, and reduced switching losses because of the potential of lower in- and output capacitances. The most common unipolar switch is the MOSFET. However, the big challenge in the case of a SiC MOSFET is the gate oxide. A gate oxide on SiC that provides adequate performance and reliability is missing until now. An alternative unipolar switching device is a normally-on JFET. The normally-on behavior is a benefit for current driven applications. If a normally-off behavior is necessary the JFET can be used together with a low voltage Si MOSFET in a cascode arrangement. Recently manufactured SiC JFETs show results in very good accordance to device simulation and demonstrate the possibility to fabricate a SiC JFET within a mass production. A growing market opportunity for such a SiC switch becomes visible.


Author(s):  
Sreenivasappa Bhupasandra Veeranna ◽  
Udaykumar R Yaragatti ◽  
Abdul R Beig

The digital control of three-level voltage source inverter fed high power high performance ac drives has recently become a popular in industrial applications. In order to control such drives, the pulse width modulation algorithm needs to be implemented in the controller. In this paper, synchronized symmetrical bus-clamping pulse width modulation strategies are presented. These strategies have some practical advantages such as reduced average switching frequency, easy digital implementation, reduced switching losses and improved output voltage quality compared to conventional space vector pulse width modulation strategies. The operation of three level inverter in linear region is extended to overmodulation region. The performance is analyzed in terms THD and fundamental output voltage waveforms and is compared with conventional space vector PWM strategies and found that switching losses can be minimized using bus-clamping strategy compared to conventional space vector strategy. The proposed method is implemented using Motorola Power PC 8240 processor and verified on a constant v/f induction motor drive fed from IGBT based inverter.


2008 ◽  
Vol 600-603 ◽  
pp. 951-954 ◽  
Author(s):  
Ty McNutt ◽  
Stephen Van Campen ◽  
Andy Walker ◽  
Kathy Ha ◽  
Chris Kirby ◽  
...  

The development of 10 kV silicon carbide (SiC) MOSFETs and Junction Barrier Schottky (JBS) diodes for application to a 13.8kV 2.7 MVA Solid State Power Substation (SSPS) is shown. The design of half-bridge power modules has extensively used simulation, from electron level device simulations to the system level trade studies, to develop the most efficient module for use in the SSPS. In the work presented within, numerical simulations and experimental results are shown to demonstrate the design and operation of 10 kV JBS diodes. It is shown that JBS diodes at 10 kV can reduce 31% of the switching losses at 20 kHz than the fastest SiC PiN diodes.


2019 ◽  
Vol 963 ◽  
pp. 625-628
Author(s):  
Ajit Kanale ◽  
B. Jayant Baliga ◽  
Ki Jeong Han ◽  
Subhashish Bhattacharya

The high-temperature switching performance of a 1.2kV SiC JBSFET is compared with a 1.2kV SiC MOSFET using a clamped inductive load switching circuit representing typical H-bridge inverters. The switching losses of the SiC MOSFET are also evaluated with a SiC JBS Diode connected antiparallel to it. Measurements are made with different high-side and low-side device options across a range of case temperatures. The JBSFET is observed to display a reduction in peak turn-on current – up to 18.9% at 150°C and a significantly lesser turn-on switching loss – up to 46.6% at 150°C, compared to the SiC MOSFET.


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